Isabelle Telliez

A compact, monolithic microwave demodulator-modulator for 64-QAM digital radio links

The design, fabrication and performance of a monolithic microwave direct modulation modulator-demodulator are presented. The subsystem is designed to work in a 64-QAM digital radio link. At this level of modulation, it is necessary to have some possibilities of phase and amplitude trimming by external voltages to achieve sufficient accuracy. The circuit includes elementary functions such as quadrature and in-phase splitters, and circuits giving the possibility to adjust phases and amplitudes for 64 QAM and higher level modulation. The design is such that the same chip can be used either as a direct demodulator or as a modulator. This complex circuit of small dimensions (2.7 mm*3.65 mm) exhibits good demodulation and modulation performances. The overall performances of this monolithic circuit are achieved without degrading the DC yield. >

A low-cost-packaged 4.9-6 GHz LNA for WLAN applications

A two stage fully integrated low-noise amplifier has been developed for 4.9-6 GHz WLAN applications. This circuit was realized in a 0.35 /spl mu/m SiGe BiCMOS process and packaged in a low cost plastic VFQFPN package. The circuit operates over a wide band (4.9-6 GHz) and draws 13.2 mA from 2.0 V supply. It exhibits a noise figure of 3.9 dB and a gain of 18.7 dB at 5.5 GHz. The measured IIP1 and IIP3 are respectively -13.9 dBm and -3.5 dBm at 5.5 GHz. The input and output return losses are lower than -10 dB and the gain ripple is less than 1.5 dB over all the frequency bandwidth.

Low frequency noise characterization and modeling of microwave bipolar devices: application to the design of low phase noise oscillator

This paper addresses advanced low frequency noise measurements and modeling of SiGe HBTs. Results have been implemented into a nonlinear Gummel Poon model which has been validated through the design of a DRO made of an integrated SiGe negative resistance in the 10 GHz range. We have obtained phase noise of -105 dBc/Hz at 10 kHz offset, which is close to the state of the art, and we have demonstrated a design technique that provides an accurate phase noise prediction.

A complete single-chip front-end for digital satellite broadcasting

This paper presents a single-chip integrating an RF tuner, a demodulator and channel decoder for digital satellite applications. The outstanding achievement is the integration of the zero IF and the demodulation on a standard 0.18 /spl mu/m CMOS process.