Isao Hamaguchi

Analysis of Buried-Oxide Dielectric Breakdown Mechanism in Low-Dose Separation by Implanted Oxygen (SIMOX) Substrates Fabricated by Internal Thermal Oxidation (ITOX) Process

Buried-oxide (BOX) dielectric breakdown behavior of low-dose separation by implanted oxygen (SIMOX) substrates fabricated by the internal thermal oxidation (ITOX) process was analyzed. From the time-zero dielectric breakdown (TZDB) characterization of the metal-oxide-semiconductor (MOS) capacitors using BOX as a dielectric, of various areas, BOX breakdown was found to be dominated by the electrically weak spots (EWSs) distributed randomly in the BOX layer. The densities of EWSs show good correlation with those of Si islands in the BOX for several samples, indicating that the Si islands are the main cause of BOX breakdown. A model for extracting the EWS density as a function of breakdown field is proposed, the appropriateness of which is verified by its application to the experimental results. Using the proposed model, the dependence of Si island density and their thickness distribution on oxygen ion dose and ITOX layer thickness was investigated, indicating that both dose reduction and ITOX enhancement can effectively reduce the Si island density. By combining the dose reduction and ITOX enhancement, BOX breakdown characteristics, almost comparable to that of the thermally grown oxide were attained, even for a relatively large capacitor area of 7.85×10-3 cm2, revealing the high performance of ITOX-SIMOX technology.

Dislocation Density Reduction in SIMOX (Separation by Implanted Oxygen) Multi-Energy Single Implantation*1

SIMOX (Separation by IMplanted OXygen) dislocation density in the surface-Si layer was reduced by a multi-energy single implantation process. In this process, implantation energy was reduced from 200 keV to 150 keV midway through a 1.6?1018/cm2 oxygen dose. After annealing at 1300? C for 6 h, threading-dislocation density was 1.5 orders of magnitude lower than under single-energy 200 keV implantation, and 3 orders of magnitude lower than under upward energy-change 150 keV?200 keV implantation. Under the new process, the oxygen-concentration depth profile was more diffuse than when upward-stepped implantation was used, as revealed by SIMS (secondary ion mass spectroscopy) and XTEM (cross-sectional transmission electron microscope) measurements.

Gate oxide integrity on ITOX-SIMOX substrates and influence of test device geometry on characterization

The integrity of gate oxides on low-dose separation by implanted oxygen (SIMOX) substrates fabricated by the internal-thermal-oxidation (ITOX) process, so-called ITOX-SIMOX substrates, was evaluated, and the influence of test device geometry on the characterization was investigated. Characterization of time-dependent dielectric breakdown (TDDB) was performed for a gate oxide of 8.6-nm thick using lateral test devices. Experimental results show considerable influence of gate electrode geometry on the gate oxide integrity (GOI) characteristics. This can be explained by a model that includes a lateral parasitic resistance in the superficial Si layer beneath the gate electrode. Based on analysis using this model, a test device with a small gate array was proposed to reduce the influence of lateral parasitic resistance, and the advantage of the device was verified.

Current-Path Observation in Low-Dose SIMOX(Separation by Implanted Oxygen) Buried-SiO2 Layer.

Current paths in the buried- SiO2 layer of low-dose SIMOX (Separation by IMplanted OXygen) wafers are observed directly by micro-beam techniques both in plan and sectional views based on Cu-plated indications. Large-area current paths display particle traces on the surface-Si layer immediately above the current path. Higher annealing temperatures (≥1330° C) decrease micro-roughness along the buried- SiO2 front/back boundaries and reduce current-path density.

Elimination of square pits on SIMOX wafer by using nitrogen-doped Cz crystal

Recent developments in LSI technology require SOI wafers for realization of higher speed operation and lower power consumption. SIMOX wafers are one of the leading SOI wafer materials, and have been revealing high performance such as excellent SOI layer thickness uniformity, even below the 0.1 /spl mu/m thickness range which is required for CMOS applications. To realize high device performance, a defect-free SOI surface is desirable, especially for achieving superior gate oxide integrity (GOI). While the GOI on the SIMOX wafers fabricated by the internal thermal oxidation (ITOX) process was reported to be superior to that on the conventional Cz wafers (Kawamura et al, 1996), it was reported that crystal originated particle (COP)-like pits exist on standard SIMOX wafers (Naruoka et al, 1997), although their origin has not been clearly resolved. In this study, we investigated the pits on ITOX-SIMOX wafers fabricated on various starting materials with different COP density. The influence of COPs in the starting materials on the pits on the SIMOX wafers was discussed and the possibility of pit-free SIMOX using nitrogen-doped Cz crystals was illustrated.

Gate oxide integrity on ITOX-SIMOX wafers

The Gate-Oxide-Integrity (GOI) on Thin-Film-Silicon-On-Insulator (TFSOI) wafers is required to be the same as that on bulk silicon wafers in a commercial stage of LSIs using SOI CMOS technology. However, the GOI on TFSOI wafers, especially charge-to-breakdown characteristics, has been reported to be inferior to that on bulk wafers. In this paper, the GOI on ITOX (Internal-Thermal-OXide)-SIMOX wafers fabricated by the low-dose implanting and High-Temperature-Oxidation (HTO) technique is investigated, revealing that ITOX-SIMOX wafers have GOI comparable to that on bulk wafers. The influence of device structures, particularly of total gate edge length, on the GOI is also discussed.

An analysis of buried-oxide growth in low-dose SIMOX wafers by high-temperature thermal oxidation

The buried-oxide (BOX) growth by a high-temperature thermal oxidation of low-dose SIMOX wafers is becoming an indispensable technique for the improvement of material quality, for example, surface roughness and BOX leak path density, as well as the slight decrease in the parasitic capacitance. The physical mechanism of the BOX growth by a thermal oxidation has been investigated for bonded wafers oxidized at 1100/spl deg/C; however, the typical oxidation temperature for low-dose SIMOX wafers is much higher than 1100/spl deg/C. To clarify the oxidation mechanism at higher temperatures and predict the thermally-grown BOX thickness for various conditions, we explore the oxidation process with a simple model based on Deal and Groves analysis.

Evaluation of fixed oxide charge and oxide-silicon interface trap densities in low-dose and high-dose SIMOX wafers

Low-dose SIMOX wafers have attracted attention for their applications to VLSI with their reduced cost and higher crystal quality. However, evaluations of low-dose wafers have not been extensively reported except for some papers on the breakdown field of buried oxide. Because of their influences on the threshold voltage, subthreshold slope, reliability, and parasitic drain/source capacitance of SOI MOSFETs, the characterization of fixed oxide charge and interface trap densities at either buried oxide interface is especially important. In this paper, we compare the fixed oxide charge and interface trap densities in low-dose and high-dose SIMOX wafers through the electrical measurement of buried oxide capacitors and SOI MOSFETs.

Experimental verification of buried-oxide with over-8 MV/cm breakdown fields in low-dose SIMOX wafers

Low-dose SIMOX wafers have attractive features as the material for advanced commercial CMOS LSIs, such as lower cost, and lower threading dislocation density (/spl sim/10/sup 2/ cm/sup -2/) than high-dose SIMOX. However, the low-dose SIMOX wafers prepared by the Internal-Thermal-OXidation (ITOX) process, still exhibited lower breakdown fields (E/sub BD/s) for the buried-oxide (/spl sim/5.5 MV/cm), when compared to the intrinsic E/sub BD/ of the thermal-oxide (>8 MV/cm) at Si surface in most cases. It has been pointed out that the E/sub BD/ degradation of Buried-OXide (BOX) is caused by the presence of Si islands in the BOX. We report here that BOX E/sub BD/s for the low-dose SIMOX is upgraded from the level of the previous case to that of thermal oxide (>8 MV/cm) by the reduction of Si islands and becomes more practical to larger unit-device-size area (7.85/spl times/10/sup -3/cm/sup 2/).