Ivano Barbieri

Search window size decision for motion estimation algorithm in H.264 video coder

In this paper, we propose, an innovative algorithm for reducing the complexity of the motion estimation (ME) module used in standard video compression applications. The idea is based on applying a motion detection algorithm for the decision of search window sizes in the motion estimation. The motion detection algorithm is based on blob coloring [D.H. Ballard and C. Brown, 1982] over sub-sampled binary images generated by block wise threshold image difference. This solution decreases the encoder complexity thanks to the reduction of SAD (sum of absolute difference) calculations especially in low complexity sequences like video-surveillance and video-telephony ones. The selected video compression algorithm for validating the proposed approach is H.264 [October 2002] that represent the state of the art of video codec.

Multimedia-application-driven instruction set architecture simulation

This paper presents an application-driven architecture-design approach. VLIW architectures and instruction set simulation were chosen to fulfill multimedia domain requirements and to implement an efficient Hw-Sw co-design tool. Innovative approaches such as pipeline status modeling, simulation cache, and simulation oriented Hw description have been described. The performance of simulation tests for two validation case studies (TI TMS320C62x and ST200) are reported.

Real-time transmission and storage of video, audio, and health data in emergency and home care situations

The increase in the availability of bandwidth for wireless links, network integration, and the computational power on fixed and mobile platforms at affordable costs allows nowadays for the handling of audio and video data, their quality making them suitable for medical application. These information streams can support both continuous monitoring and emergency situations. According to this scenario, the authors have developed and implemented the mobile communication system which is described in this paper. The system is based on ITU-T H.323 multimedia terminal recommendation, suitable for real-time data/video/audio and telemedical applications. The audio and video codecs, respectively, H.264 and G723.1, were implemented and optimized in order to obtain high performance on the system target processors. Offline media streaming storage and retrieval functionalities were supported by integrating a relational database in the hospital central system. The system is based on low-cost consumer technologies such as general packet radio service (GPRS) and wireless local area network (WLAN or WiFi) for lowband data/video transmission. Implementation and testing were carried out for medical emergency and telemedicine application. In this paper, the emergency case study is described.

Health parameters and video live transmission with data storage on database, in emergency telemedicine

Mobile communication technologies could strongly help in facing health emergency situation. Thanks to wireless communication techniques, real time audio, video, medical parameters transmission and information storage are nowadays possible. Electrocardiogram, blood pressure and other patients information are sent to a remote hospital/medical database center server. Actions taken by the emergency staff are stored for real time operative-center interaction and for a successive database consultation. The emergency video recording is often useful as legal evidence in case of disputation. In this paper a real time connection telemedical system is described. The system is based on low-cost consumer technologies such as GPRS and WiFi for low-band data/video transmission, H.264 for the real time video stream encoding and database video storage. A relational database has been used for store and query data All system is based on Microsoft .Net technology allowing great portability and stability to overall modules, such as HMI (human machine interface) and multimedia codecs

A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures

The increasing of computational power requirements for DSP and Multimedia application and the needs of easy-to-program development environment has driven recent programmable devices toward Very Long Instruction Word (VLIW) [1] architectures and Hw-Sw co-design environments [2]. VLIW architecture allows generating optimized machine code from high-level languages exploiting Instruction Level Parallelism (ILP) [3]. Furthermore, applications requirements and time to market constraints are growing dramatically moving functionalities toward System on Chip (SoC) direction. This paper presents VLIW-SIM, an Application-Driven Architecture-design approach based on Instruction Set simulation. VLIW architectures and Instruction Set simulation were chosen to fulfill multimedia domain requirements and to implement an efficient Hw-Sw co-design environment. The VLIW-SIM simulation technology is based on pipeline status modeling, Simulation cache and Simulation Oriented Hw description. An effective support for Hw-Sw co-design requires high simulation performance (in terms of Simulated Instruction per Second—SIPS), flexibility (the ability to represent a number of different architectures) and cycle accuracy. There is a strong trade-off between these features: cycle accurate or close to cycle accurate simulation have usually low performance [4, 5]. Good simulation performance can be obtained loosing the simulator flexibility. Moreover SoC simulation requires a further degree of flexibility in simulating different components (core, co-processors, memories, buses). The proposed approach is focused on interpretative (not compiled [6]) re-configurable Instruction Set Simulator (ISS) in order to support both application design and architecture exploration. VLIW-SIM main features are: efficient host resource allocation, Instruction Set and Architecture description Flexibility (Instruction Set Dynamic Generation and Simulation Oriented Hardware Description), Step by step pipeline status tracking, Simulation Speed and Accuracy. Performance of simulation test for three validation case studies (TI TMS320C62x, TI TMS320C64x and ST200) are reported.

Real time scalable video communication demonstration at ICMCS-99

This document describes the demonstration of the Scaleable Video Communication Unit (VCU) at ICMCS-99 in Florence. The demonstration simulates two different field-applications: Distance Learning (DL) and Forest Surveillance (FS). The VCU is based on a scalable H263+ video codec integrated in a H324 multimedia terminal used as a common core for the two applications addressed in the SCALAR field tests.

Control of AC-DC matrix converter using digital PLL

In this paper, the implementation of a DSP controlled ac-dc matrix converter is presented. A Phase Locked Loop is used to synchronize the high frequency ac voltage synthesized by the matrix converter with the three phase input line. This solution allows obtaining a stable output dc voltage even in case of non ideal input phases, which is the typical actual input in an industrial environment. Experimental results, obtained with a 5kW prototype and compared with computer simulated model results, are shown. Functional issues are discussed and design solutions proposed and implemented.

Single phase inverter grid connected, controlled by fundamental harmonic calculation

In this paper a single phase inverter grid connected implementation is presented. The proposed solution is based on the calculation of the input line fundamental harmonic using a DSP processor. Our aim is to increase the inverter performance through a better synchronization with the grid and achieving a unitary power factor even in case of distorted input line, usually present in industrial environments. Typical application is, but not limited to, the exploitation of solar or wind energy. The system implementation most critical issues and results achieved with a 1.5kW prototype are shown.

A DSP controlled three phase AC-DC matrix converter

In this paper, the implementation of a DSP controlled AC-DC matrix converter is presented. Experimental results, obtained with a 5 kW prototype and compared with analogous results of a computer simulated model, are shown. Functional issues are discussed and design solutions proposed and implemented.

Multimedia terminal system-on-chip design and simulation

This paper proposes a design approach based on integrated architectural and system-on-chip (SoC) simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word (VLIW) digital signal processors (DSPs), the utilization of a device multiplexing the media streams, and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform, giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture (ISA) simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach, the evaluation of an audio-video multiprocessor terminal is presented, and the complete simulation test results are reported.