J. F. Gibbons

Ion implantation in semiconductors—Part II: Damage production and annealing

Radiation damage is produced in a crystalline target whenever a moving ion transfers sufficient energy to a target atom to displace it from its lattice site. For conditions of practical importance in ion implantation, the radiation damage produced by the injected ions is severe, and the crystal must be carefully Annealed if the chemical effects of the implanted ions are to dominate the residual damage. The purpose of this paper is to review work that has been performed over the past several years in an effort to understand implantation-produced damage and its annealing characteristics, especially in silicon. The subject is developed as follows. A qualitative description of the damage produced by an implanted ion is presented in Section I, followed by a partial inventory of the basic defects that are found in ion-implanted silicon (Section II). The structure of individual damage clusters produced by both heavy and light ions is then described in Section III, where theoretical predictions are compared to a variety of experimental data. This is followed with a section on the depth distribution of defects and damage clusters (Section IV); and the paper is then concluded with a section on the annealing characteristics of implantation-produced damage (Section V). The development is organized to give primary emphasis to those facts and ideas that are essential for applications of ion implantation in the fabrication of MOS and junction devices in silicon. A future paper will review the state of the art in compound semiconductors.

Switching properties of thin Nio films

Abstract This paper describes a two-terminal solid-state switch made from a thin film of nickel oxide. The switch has a typical OFF resistance of 10–20 MΩ and a typical ON resistance of 100–200 Ω. Switching times are in the 0·1–10 μsec range. The switching action is thought to be due to the formation and rupture of a nickel filament in the NiO matrix. The formation process is such that after about 100–1000 switching cycles, the devices to be described fail ‘short’; i.e. they cannot be switched out of the ON condition with normal switching signal amplitudes. Several experiments which elucidate the switching mechanism and the terminal properties of the device are described.

Fabrication and analysis of deep submicron strained-Si n-MOSFET's

Deep submicron strained-Si n-MOSFETs were fabricated on strained Si/relaxed Si/sub 0.8/Ge/sub 0.2/ heterostructures. Epitaxial layer structures were designed to yield well-matched channel doping profiles after processing, allowing comparison of strained and unstrained Si surface channel devices. In spite of the high substrate doping and high vertical fields, the MOSFET mobility of the strained-Si devices is enhanced by 75% compared to that of the unstrained-Si control devices and the state-of-the-art universal MOSFET mobility. Although the strained and unstrained-Si MOSFETs exhibit very similar short-channel effects, the intrinsic transconductance of the strained Si devices is enhanced by roughly 60% for the entire channel length range investigated (1 to 0.1 /spl mu/m) when self-heating is reduced by an ac measurement technique. Comparison of the measured transconductance to hydrodynamic device simulations indicates that in addition to the increased low-field mobility, improved high-field transport in strained Si is necessary to explain the observed performance improvement. Reduced carrier-phonon scattering for electrons with average energies less than a few hundred meV accounts for the enhanced high-field electron transport in strained Si. Since strained Si provides device performance enhancements through changes in material properties rather than changes in device geometry and doping, strained Si is a promising candidate for improving the performance of Si CMOS technology without compromising the control of short channel effects.

Comparative study of phonon‐limited mobility of two‐dimensional electrons in strained and unstrained Si metal–oxide–semiconductor field‐effect transistors

The phonon‐limited mobility of strained Si metal–oxide–semiconductor field‐effect transistors (MOSFETs) fabricated on a SiGe substrate is investigated through theoretical calculations including two‐dimensional quantization, and compared with the mobility of conventional (unstrained) Si MOSFETs. In order to match both the mobility of unstrained Si MOSFETs and the mobility enhancement in strained Si MOSFETs, it is necessary to increase the coupling of electrons in the two‐dimensional gas with intervalley phonons, compared to the values used in conventional models. The mobility enhancement associated with strain in Si is attributed to the following two factors: the suppression of intervalley phonon scattering due to the strain‐induced band splitting, and the decrease in the occupancy of the fourfold valleys which exhibit a lower mobility due to the stronger interaction with intervalley phonons. While the decrease in the averaged conductivity mass, caused by the decrease in the occupancy of the fourfold valle...

Electron mobility enhancement in strained-Si n-type metal-oxide-semiconductor field-effect transistors

Enhanced performance is demonstrated in n-type metal-oxide-semiconductor field-effect transistors with channel regions formed by pseudomorphic growth of strained Si on relaxed Si/sub 1/spl minus/x/Ge/sub x/. Standard MOS fabrication techniques were utilized, including thermal oxidation of the strained Si. Surface channel devices show low-field mobility enhancements of 80% at room temperature and 12% at 10 K, when compared to control devices fabricated in Czochralski Si. Similar enhancements are observed in the device transconductance. In addition, buried channel devices show peak room temperature mobilities about three times that of control devices.<<ETX>>

Temperature distributions produced in semiconductors by a scanning elliptical or circular cw laser beam

Temperature profiles induced by a cw laser beam in a semiconductor are calculated. The calculation is done for an elliptical scanning beam and covers a wide range of experimental conditions. The limiting case of a circular beam is also studied. This calculation is developed in the particular cases of silicon and gallium arsenide, where the temperature dependence of the thermal conductivity has been taken into consideration. Using a cylindrical lens to produce an elliptical beam with an aspect ratio of 20, a 1‐mm‐wide area of an ion‐implanted silicon wafer was annealed in a single scan. The experimental data are consistent with the extrapolation of solid‐phase epitaxial regrowth rates to the calculated laser‐induced temperatures.

Stoichiometric disturbances in ion implanted compound semiconductors

Disturbances in the stoichiometry of compound semiconductors which result from ion implantation are calculated using a Boltzmann transport equation approach. Results for 50‐keV boron, 150‐keV silicon, and 400‐keV selenium implanted into silicon carbide, indium phosphide, and gallium arsenide are presented. Possible complications in the annealing of such implants are discussed.

Limited reaction processing: Silicon epitaxy

We introduce a new technique, limited reaction processing, in which radiant heating is used to provide rapid, precise changes in the temperature of a substrate to control surface reactions. This process was used to fabricate thin layers of high quality epitaxial silicon. Abrupt transitions in doping concentration at the epitaxial layer/substrate interface were achieved for undoped films deposited on heavily doped substrates.

cw laser anneal of polycrystalline silicon: Crystalline structure, electrical properties

0.4‐μm‐thick polycrystalline silicon deposited in a low‐pressure CVD reactor was implanted with B to a dose of 5×1014/cm2 and then irradiated in a cw laser scanning apparatus. The laser annealing produced an increase in grain size from ∼500 A to long narrow crystals of the order of ∼25×2 μ, as observed by TEM. Each grain was found to be defect free and extended all the way to the underlying Si3N4. Electrical measurements show 100% doping activity with a Hall mobility of about 45 cm2/V sec, which is close to single‐crystal mobility at the same carrier concentration. Thermal annealing produces material with an average grain size of 1000 A and a resistivity higher by a factor of 2.2 than that obtained with the laser anneal. Laser annealing performed after a thermal anneal reduces the resistivity to approximately the same value obtained by laser annealing only.

Transconductance enhancement in deep submicron strained Si n-MOSFETs

We report the first measurements on deep submicron strained-Si n-MOSFETs. In spite of the high channel doping and vertical effective fields, electron mobility is enhanced by /spl sim/75% compared to typical MOSFET mobilities. The extrinsic transconductance is increased by /spl sim/45% for channel lengths of 0.1 /spl mu/m, when AC measurements are used to reduce self-heating effects. The improved transconductance demonstrates the use of strain-induced enhancements in both mobility and high-field transport to increase the average electron velocity, while maintaining the channel doping required to suppress short channel effects.