J.H. Jang

High performance indium gallium zinc oxide thin film transistors fabricated on polyethylene terephthalate substrates

High-performance amorphous (α−) InGaZnO-based thin film transistors (TFTs) were fabricated on flexible polyethylene terephthalate substrates coated with indium oxide (In2O3) films. The InGaZnO films were deposited by rf magnetron sputtering with the presence of O2 at room temperature. The n-type carrier concentration of InGaZnO film was ∼2×1017 cm−3. The bottom-gate-type TFTs with SiO2 or SiNx gate dielectric operated in enhancement mode with good electrical characteristics: saturation mobility 11.5 cm2 V−1 s−1 for SiO2 and 12.1 cm2 V−1 s−1 for SiNx gate dielectrics and drain current on-to-off ratio >105. TFTs with SiNx gate dielectric exhibited better performance than those with SiO2. This is attributed to the relatively high dielectric constant (i.e., high-k material) of SiNx. After more than 500 h aging time at room temperature, the saturation mobility of the TFTs with SiO2 gate dielectric was comparable to the as-fabricated value and the threshold voltage shift was 150 mV.

Carrier concentration dependence of Ti∕Au specific contact resistance on n-type amorphous indium zinc oxide thin films

Ti(200A)∕Au(800A) Ohmic contacts to n-type amorphous indium zinc oxide (IZO) films with carrier concentrations of (1×1015)–(5×1020)cm−3 showed as-deposited specific contact resistances in the range of (3×10−1)–(1×10−4)Ωcm2. Postgrowth annealing from 200to500°C resulted in significant improvement in contact resistances due to increase of the carrier concentration in the near surface region of IZO layer, which can be attributed to the formation of Ti–O alloy phases that induce oxygen vacancies in the IZO. After annealing at 500°C, the lowest contact resistance of 8×10−6Ωcm2 was achieved in the sample with carrier concentration of 5×1020cm−3. Temperature dependent measurement showed that tunneling was dominant transport mechanism in the contacts on the most highly doped films (n∼5×1020cm−3) and thermionic emission on the most lightly doped films (n∼1×1015cm−3).

Study of defects evolution in GaN layers grown by metal-organic chemical vapor deposition

GaN layers were grown on c-plane sapphire substrates by metal-organic chemical vapor deposition with a conventional two step growth method. The effect of the three-dimensional (3D) growth mode time (t3D), which depends on trimethylgallium flow rate and growth temperature, on the crystalline quality of the GaN layers was investigated by high resolution x-ray diffraction. Tilt and twist angles were estimated from full width at half maximum (FWHM) of the omega rocking curves (ω‐RCs) recorded from the planes parallel and perpendicular to the sample surface. Grazing incidence x-ray diffraction was used for a direct measurement of the twist angle. The threading dislocation densities of GaN layers were estimated from the FWHM values of (0002) and (101¯0) ω‐RCs. It was found that while the screw-type dislocations were independent of t3D, the edge-type dislocation density decreased with increasing t3D. Investigations of the structural defects using transmission electron microscopy showed that almost all dislocatio...

Interface dependent electrical properties of amorphous InGaZnO4 thin film transistors

The performance of amorphous InGaZnO4 thin film transistors with three different gate dielectrics (SiO2, SiON, and SiNx) is reported. The gate dielectric films were prepared by plasma enhanced chemical vapor deposition with SiH4, N2O, and NH3 gases at 250°C. Current-voltage (C-V) and refractive index characterization showed that different film compositions were achieved when changing the flow rate of N2O in the precursor gas mixture. The use of SiNx films reduced the interfacial roughness of the channel/gate dielectric by a factor of 2.3 compared to SiO2. This results in an improvement of saturation mobility of the thin film transistors (TFTs) by a similar factor. An enhancement of subthreshold gate-voltage swing and drain current on-to-off ratio for TFTs with SiNx was also attributed to the reduction of the trap density at the channel/gate-dielectric interface.

Fabrication of compositional graded Si1−xGex layers by using thermal oxidation

Compositional graded and highly relaxed Si1−xGex layers have been fabricated by using thermal oxidation at high temperature. It was found that the behavior of Ge atoms during thermal oxidation was significantly dependent of the oxidation temperature. The Ge accumulation below the oxide occurred at 800 and 900 °C due to a large difference of the heat formation of GeO2 and SiO2. However, Si1−xGex layers oxidized in 1000 °C did not show any Ge accumulation because Ge diffusion efficiently occurred. The compositional graded Si1−xGex layers fabricated by thermal oxidation can be used as virtual substrates for the strained-Si and relaxed-SiGe applications.

Structural characterization of strained silicon grown on a SiGe buffer layer

The microstructure of about 50 nm thick strained-Si/Si0.7Ge0.3/graded-SiGe/Si-substrate layers grown by MBE (molecular beam epitaxy) was characterized using high-resolution x-ray based characterization techniques. The degree of relaxation of the Si-capping layer after a thermal anneal at 800 ! C for 30 min was determined using reciprocal space map (RSM) scans recorded around the (1 1 3) diffraction plane. However, since a RSM is not suitable when the strain relaxation is very small, x-ray reflectivity (XRR) and omega rocking curves (! -RCs) were employed for the relaxation study. XRR spectra were collected and analyzed to obtain thickness, Ge concentration and surface/interfacial roughness information of the as-grown and annealed samples. ! -RCs were performed in order to investigate the crystalline quality of the samples. It was found that the annealed strained layer showed higher Lorentzian fraction in ! -RCs and misfit defect density which were caused by strain relaxation. In addition, the results showed that after the annealing process the broadening in the tail region of the ! -RCs was indicative of a change in the coherence length distribution of the crystallite size. The misfit defects and surface morphology obtained from transmission electron microscopy (TEM) and atomic force microscopy (AFM) investigations were consistent with results obtained from the x-ray based characterization techniques.

Study of interface degradation of Hf-silicate gate dielectrics during thermal nitridation process

An evaluation of the effect of nitridation temperature on interface layer (IL) quality of Hf-silicate gate dielectric prepared by the atomic layer deposition method has been reported. An increase in IL density and IL roughness was observed by x-ray reflectivity as the nitridation temperature was increased. X-ray photoelectron spectroscopy showed preferential interface reaction at the dielectric-Si interface at higher temperatures. The progressive increase in IL roughness finally led to degradation of the breakdown voltage, a shift in flat band voltage (∼0.54V), and deterioration of electron channel mobility by ∼20% in samples nitrided at 850°C.