J.L. Ausin

1-V rail-to-rail operational amplifiers in standard CMOS technology

The constraints on the design of CMOS operational amplifiers with rail-to-rail input range for extremely low supply voltage operation, are addressed. Two design approaches for amplifiers based on complementary input differential pairs and a single input pair, respectively, are presented. The first realizes a feedforward action to accommodate the common-mode (CM) component of the input signals to the amplifier input range. The second approach performs a negative feedback action over the input CM signal. Two operational amplifiers based on the proposed approaches have been designed for 1-V total supply operation, and fabricated in a standard 1.2-/spl mu/m CMOS process. Experimental results are provided and the corresponding performances are discussed and compared.

Constant-g/sub m/ constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries

This paper introduces a general-purpose low-voltage rail-to-rail input stage suitable for analog and mixed-signal applications. The proposed circuit provides, simultaneously, constant small-signal and large-signal behaviors over the entire input common-mode voltage range, while imposing no appreciable constraint for high-frequency operation. In addition, the accuracy of the circuit does not rely on any strict matching of the devices, unlike most of the traditional approaches based on complementary input pairs, which need to compensate for the difference in mobility between electrons and holes with the transistor aspect ratios. Also, the technique is compatible with deep submicrometer CMOS devices, where the familiar voltage-to-current square law in saturation is not completely satisfied. Based on the proposed input stage, a transconductor with rail-to-rail input common-mode range and an input/output rail-to-rail operational amplifier were developed. Both cells were designed to operate with a 3-V single supply and fabricated in standard 0.8-/spl mu/m CMOS technology. Experimental results are provided.

Feedback vs. feedforward common-mode control: a comparative study

A comparison among feedforward (CMFF) and the traditional common-mode feedback (CMFB) loops, based on the most frequently used common-mode (CM) signal detectors for CM control in fully-differential (FD) circuits, is carried out. Simulated results confirm that CMFF shows a better performance in terms of induced nonlinear signal distortion, speed, and amplifier output signal swing. It is demonstrated that feedforward approach results very attractive for low-voltage applications.

Switched-capacitor circuits with periodical nonuniform individual sampling

The operation of switched-capacitor (SC) circuits with periodical nonuniform individual sampling (PNIS) is introduced. The basic idea consists in a time averaged control of the effective rate of charge delivered by any given SC structure. In this way, the equivalent resistance of each SC branch in a circuit is individually controlled by programming the number of clock pulses in which it is active in a predetermined period of time. It is shown that this additional design degree of freedom provides a very wide programmability range in all response parameters. A second-order SC filter programmable by PNIS has been designed and fabricated in conventional CMOS technology. Experimental results are in good agreement with theoretical ones, and demonstrate the effectiveness and versatility of the proposed technique for low-frequency applications.

Nonlinear Shaping SC Oscillator With Enhanced Linearity

A nonlinear shaping technique for a switched-capacitor (SC) bandpass filter (BPF) based oscillator yielding enhanced linearity is presented. Usually, for an SC oscillator consisting of a BPF and a two-level comparator, the linearity can only be improved by increasing the quality factor (-factor) of the BPF. This paper proposes an efficient way to improve the linearity of SC BPF-based oscillators. In particular, by replacing the conventional two-level comparator by a sound multilevel comparator, a nonlinear shaping of the signal at the output of the comparator causes a significant improvement in linearity. To illustrate the effectiveness of the proposed technique, one conventional SC BPF-based oscillator and the proposed oscillator have been designed and fabricated in a standard 0.35- CMOS technology. Each oscillator was designed to operate from a 1.65 V supply voltage and a master clock frequency of 80 MHz. The oscillation frequency is 10 MHz and the -factor of the BPF is 10. Experimental results demonstrate that the proposed scheme improves the third-order harmonic distortion by 20 dB with respect to the conventional SC BPF-based oscillator.

Input/Output Rail-to-Rail CMOS Operational Amplifier with Shaped Common-Mode Response

This paper presents an input/output rail-to-rail class-AB CMOS operational amplifier with reduced variations in unity-gain frequency over the entire voltage range. The rail-to-rail amplifier input stage is based on two parallel-connected complementary differential pairs. Variations in the small-signal response are kept to a minimum by realizing an adequate shaping of the CM response of the input stage, while still reducing deviations in the total limiting current of the two input pairs with respect to traditional solutions. This is achieved independently of the gm-ID characteristic of the amplifier input devices and of any strict matching condition between the complementary input pairs. Experimental results from a 3-V 0.8-μm CMOS test-chip are given.

1-V Quasi constant-g m input/output rail-to-rail CMOS op-amp

A CMOS operational amplifier with input/output rail-to-rail range is presented. The circuit operates with a 1-V single supply. It uses dynamically biased input level shifters, controlled by a novel tuning scheme, to extend the input common-mode voltage range from one rail to the other. The tuning circuit takes the total biasing current of the amplifier input stage and, hence, its small-signal response into account. As a result, the total input transconductance variations are lower than ±10% over the entire voltage range. Experimental results on a test-chip fabricated in standard 0.8-µm CMOS technology are given.

High-Selectivity Switched-Capacitor Bandpass Filter with Quasi-Continuous Quality Factor Tunability

This paper describes the design and implementation of a second-order switched-capacitor (SC) bandpass (BP) filter with very wide quality factor (Q) programmability range. The filter selectivity is digitally programmed by varying the effective sampling frequency of an SC branch, without modifying any capacitor value. The proposed approach allows a quasi-continuous Q-factor tunability avoiding, in principle, the inherent quantization error associated to any traditional programming technique. Automatic Q-factor tuning is performed by using a scheme based on an amplitude-locking loop approach. Experimental results obtained from a 0.8-μm CMOS integrated prototype demonstrate the versatility of the proposed technique for high-Q SC BP filters.

Periodical nonuniform individually sampled switched-capacitor circuits

This paper presents a technique for programmable switched-capacitor (SC) filters based on periodical nonuniform individual sampling (PNIS) of each SC structure in the filter. It is shown how very wide range of programmability in all circuit parameters can be obtained, whereas the dynamic range degradation is kept minimum. Experimental results obtained from a 1.2 /spl mu/m CMOS second-order SC filter are given.

Design of limiting/logarithmic amplifier for wideband bioimpedance measuring devices

In this paper, a limiting/logarithmic amplifier (LLA) for high dynamic range wideband bioelectrical impedance measurements is presented. The amplifier is composed of eight cascaded gain stages with a folded diode-connected transistor as a load that attain wide bandwidth performance with limited power consumption. The logarithmic conversion of the input variable is carried out with the aid of nine detectors. A prototype in standard 0.35-μm CMOS technology occupies 0.06 mm2 of silicon area and dissipates 2.2 mW from a single 2-V supply. Post-layout results show that the LLA is capable of processing a 65-dB input dynamic range over a frequency interval from 1 kHz to 1 MHz with an accuracy within ± 0.7 dB.