J.L. Autran
Institut national des sciences Appliquées de Lyon
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Featured researches published by J.L. Autran.
Materials Science & Engineering R-reports | 1998
C. Chaneliere; J.L. Autran; R.A.B. Devine; B. Balland
Abstract This paper reviews the present knowledge on tantalum pentoxide (Ta 2 O 5 ) thin films and their applications in the field of microelectronics and integrated microtechnologies. Different methods used to produce tantalum oxide layers are described, emphazing elaboration mechanisms and key parameters for each technique. We also review recent advances in the deposition of Ta 2 O 5 in the particular field of microelectronics where high quality layers are required from the structural and electrical points of view. The physical, structural, optical, chemical and electrical properties of tantalum oxide thin films on semiconductors are then presented and essential film parameters, such as optical index, film density or dielectric permittivity, are discussed. After a reminder of the basic mechanisms that control the bulk electrical conduction in insulating films, we carefully examine the origin of leakage currents in Ta 2 O 5 and present the state-of-the-art concerning the insulating behaviour of tantalum oxide layers. Finally, applications of tantalum oxide thin films are presented in the last part of this paper. We show how Ta 2 O 5 has been employed as an antireflection coating, insulating layer, gate oxide, corrosion resistant material, and sensitive layer in a wide variety of components, circuits and sensors.
Microelectronic Engineering | 1997
R.A.B. Devine; C. Chaneliere; J.L. Autran; B. Balland; P. Paillet; J.L. Leray
Abstract A novel electron cyclotron resonance plasma-enhanced chemical vapor deposition process using an alternative carbon-free source, namely TaF 5 , is proposed to obtain high quality amorphous Ta 2 O 5 films. The excellent physical and electrical properties suggest that this material is clearly compatible with the requirements of high density CMOS operation, as demonstrated by the fabrication of p-channel MOS transistors with a Ta 2 O 5 gate insulator.
Journal of Non-crystalline Solids | 1999
A Pêcheur; J.L. Autran; J.P Lazarri; P Pinard
Abstract Silicon dioxide films have been deposited on silicon substrates at low temperature (50°C) by plasma enhanced decomposition of hexamethyldisilazane (HMDS). Physical and chemical properties of as-deposited HMDS–SiO2 films have been determined by refractive index, etch rate and stress measurements, infrared transmission spectra, and secondary ion mass spectroscopy. Film properties have been measured as a function of various process parameters including O2 flow rate, chamber pressure, and current intensity. These studies have shown that HMDS–SiO2 are deposited with a nearly stoichoimetry composition, good step coverage and thickness uniformity. Post-deposition annealing treatment in N2 ambient for 2 h at moderate temperature (100°C) results in a reduction of the internal stress and in removal of residual impurities, such as absorbed water or –OH groups.
Journal of Non-crystalline Solids | 1995
J.L. Autran; B. Balland; D. Babot
Abstract The charge pumping response of interface traps and near-interfacial oxide traps (border traps) induced by Co60 gamma rays in submicrometer (0.5 μm channel length) metal-oxide-semiconductor transistors has been studied. Using an improved three-level charge pumping technique, the energy distribution of interface trap parameters (emission times, capture cross-sections and interface state density) has been determined after irradiation in both the upper and lower parts of the silicon band gap on n-channel devices. The influence of border traps on three-level charge pumping measurements is demonstrated for the first time. Good agreement has been found between standard charge pumping and three-level charge pumping characteristics in terms of ‘breakpoint frequency’ at which the charge recombined per cycle deviates from the fast interface state response. The distance of border traps from the interface has been estimated to be ∼ 15–20 A from a trap-to-trap tunneling model. In addition, a new technique is presented based on three-level charge pumping measurements to determine a border trap distribution in the silicon band gap.
Journal of Non-crystalline Solids | 1999
C. Chaneliere; J.L. Autran; S. Four; R.A.B. Devine; B. Balland
Abstract The conduction mechanisms in Al/Ta 2 O 5 /SiO 2 /n-Si and Al/Ta 2 O 5 /Si 3 N 4 /n-Si capacitors were studied from both the experimental and theoretical points of view. Amorphous Ta 2 O 5 thin films were deposited by plasma enhanced chemical vapour deposition from TaF 5 on thermally grown SiO 2 and low pressure chemical vapour deposited Si 3 N 4 . To identify the conduction processes, the experimental current–voltage traces were compared to theoretical curves calculated in steady-state regime by using the current continuity equation and the Kirchhoff voltage law. In Ta 2 O 5 /SiO 2 capacitors, an electronic hopping conduction process and a field emission were identified in SiO 2 , associated with a Poole–Frenkel effect in Ta 2 O 5 . In Ta 2 O 5 /Si 3 N 4 structures, an electronic hopping conduction process and a Fowler–Nordheim tunneling were observed in Si 3 N 4 with an electronic conduction and a Poole–Frenkel effect in Ta 2 O 5 . The electric field is localised in the nitride layer, and the leakage current densities of the Ta 2 O 5 /Si 3 N 4 capacitors are reduced by the increase of the Si 3 N 4 thickness.
Journal of Non-crystalline Solids | 2001
N. Pic; A. Glachant; S. Nitsche; J.Y. Hoarau; D. Goguenheim; Dominique Vuillaume; A. Sibai; J.L. Autran
Ultra-thin (<5 nm thick) thermal oxide and oxynitride films with different compositions are candidates for complementary metal/oxide/semiconductor technology in ultra-large-scale integration (ULSI) applications. The latter are expected to offer the best compromise between nitrides and oxides. The aim of this work is to measure the electrical properties of a leaky 2.5 nm thick thermally grown oxide film using the high frequency capacitance-voltage (HF C( V)) measurements. The cleanliness and the surface roughness of the Si( 00) surface were measured prior to in situ oxidation by means of, respectively, Auger electron spectroscopy (AES) and atomic force microscopy (AFM). The physical-chemical properties of the thermal oxide film were measured by AES (film thickness, composition). Fourier transform infrared spectroscopy (FTIR) (composition, vibration modes), cross-sectional transmission electron microscopy (TEM) (film thickness, homogeneity) and electron energy loss spectroscopy (EELS) (gap width determination). The results are compared to those obtained for the native oxide film and a chemical oxide film. The latter was first grown on the silicon substrate to prevent contamination and surface disorder after flash heating in vacuum prior to oxide growth. The substrate Si(100) surface cleaned in ultra-high vacuum (UHV) was then oxidized in a 10 3 mbar oxygen (O 2 ) gas pressure at 900°C to get the 2.5 nm thick oxide film. The grafting of a self-assembled insulating monolayer (SAM) of organic molecules on the grown oxide film permits us to obtain analysable capacitance as a function of voltage data. Indeed, this monolayer made up of octadecyltrichlorosilane molecules leads to a reduction of the leakage current through the aluminium/self-assembled monolayer/oxide/silicon heterostructure. The resulting current as a function of voltage data were compared to those of a standard 2.5 nm thick oxide film. The method proposed here to extract the electrical parameters of the thermal oxide film is demonstrated to be valid. We show mainly that the reduction of the leakage current through the aluminium/self-assembled monolayer/thermal oxide/silicon heterostructure is seven orders of magnitude bigger than in the case of the native oxide film.
Microelectronic Engineering | 1997
S. Pierunek; J.L. Autran; B. Leroy; L.M. Gaborieau; B. Balland
Abstract This paper reports the adaptation of charge pumping on a single DRAM cell for the in situ characterization of individual interface traps. The spatial trap distribution along the different interfaces of the DRAM cell transistor (under the gate and along the ONO/Si lateral interface) has been extensively investigated. Combining charge pumping measurements with numerical simulations allows to extract the exact trap locations.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1994
F. Djahli; J.L. Autran; C. Plossu; B. Balland
Abstract By using the charge pumping technique we have separated the interface state from the fixed charge effects when non-uniform MOSFET degradation is induced by hot-carrier injection under electrical stress. For n-channel MOSFETs we show that, after a hot-electron injection, hot-holes can also be injected into the gate oxide under the same stress conditions. In this article we also show, by the study of static characteristics before and after the electrical stress, that the transductance degradation ΔG m and the threshold voltage shift ΔV T (induced by a maximum substrate current stress condition) follow an Atn law, but with very different values of n .
Journal of Non-crystalline Solids | 1995
J.L. Autran; C. Plossu; Frédéric Seigneur; B. Balland; Alain Straboni
Abstract In this work, electrical properties of the Siue5f8SiO2 interface have been investigated in terms of interface-trap parameters (emission time, capture cross-section, state density) by standard and three-level charge pumping techniques in n-channel thin-film (8 nm) metal-oxide-semiconductor field-effect transistors. Some of the devices have been nitrided in an ammonia plasma reactor and reoxidized in oxygen. For nitrided devices, a significant decrease of interface state density, Dit, has been observed as compared with pure oxide devices. This reduction clearly corresponds to both an uniform decrease of Dit over the silicon band gap and a decrease of a Dit peak in the upper part of the band gap. The evolution of capture cross-sections has been also monitored and found to significantly vary for electron traps. This substantial change in electron interface-trap properties could be at the origin of the augmentation of the high field transconductance observed for these n-channel devices after such a nitridation process.
Journal of Non-crystalline Solids | 1999
S. Pierunek; D Pogany; J.L. Autran; B. Leroy
This paper reports random telegraph signal (RTS) noise and charge pumping measurements both performed on the selection transistor of a single 16 Mbits dynamic random access memory (DRAM) cell. Hot carrier induced degradation has been evaluated after stress in terms of generation of slow and fast interface traps. Due to the three dimensional design of the DRAM cell, we show how it is possible to scan electrically active defects in different parts of the transistor structure by varying the potential distributions in the DRAM cell. Defect location is then made possible using complementary numerical simulations.