J.P. Xu

Improved performance and reliability of N 2 O-grown oxynitride on 6H-SiC

This letter reports, for the first time, N/sub 2/O-grown oxides on both n-type and p-type 6H-SiC wafers. It is demonstrated that the N/sub 2/O-grown technique leads to not only greatly improved SiC/SiO/sub 2/ interface and oxide qualities, but also considerably enhanced device reliabilities as compared to N/sub 2/O-nitrided and conventional thermally oxidized devices. These improvements are especially obvious for p-type SiC MOS devices, indicating that N/sub 2/O oxidation could be a promising technique for fabricating enhancement-type n-channel SiC MOSFETs.

Improved electrical properties of Germanium MOS capacitors with gate dielectric grown in wet-NO ambient

Wet-NO oxidation with or without wet NH/sub 3/ pretreatment is used to grow GeON gate dielectric on Ge substrate. As compared to dry NO oxidation, negligible growth of GeO/sub x/ interlayer and, thus, a near-perfect GeON dielectric can be obtained by the wet-NO oxidation. As a result, MOS capacitors prepared by this method show greatly reduced interface-state and oxide-charge densities and gate-leakage current. This should be attributed to the hydrolyzable property of GeO/sub x/ in water-containing atmosphere.

Interface properties of NO-annealed N/sub 2/O-grown oxynitride

The oxide/Si interface properties of gate dielectric prepared by annealing N/sub 2/O-grown oxide in an NO ambient are intensively investigated and compared to those of O/sub 2/-grown oxide with the same annealing conditions. Hot-carrier stressings show that the former has a harder oxide/Si interface and near-interface oxide than the latter. As confirmed by SIMS analysis, this is associated with a higher nitrogen peak concentration near the oxide/Si interface and a larger total nitrogen content in the former, both arising from the initial oxidation in N/sub 2/O instead of O/sub 2/.

Effects of Different Annealing Gases on Pentacene OTFT With HfLaO Gate Dielectric

Pentacene organic thin-film transistors (OTFTs) with HfLaO high-κ gate dielectric were fabricated. The dielectric was prepared by a sputtering method and then annealed in N₂, NH₃, O₂, or NO at 400 °C. The carrier mobility of the NH₃-annealed OTFT could reach 0.59 cm²/V · s, which is higher than those of the other three devices. Moreover, the NH₃-annealed OTFT obtained the smallest subthreshold swing of 0.26 V/dec among them. Furthermore, 1/f noise measurement indicated that the NH₃-annealed OTFT achieved the smallest 1/f noise. All these should be attributed to the improved interface between the gate dielectric and the organic semiconductor associated with the passivation effects of the NH₃ annealing on the dielectric surface.

Effects of wet N/sub 2/O oxidation on interface properties of 6H-SiC MOS capacitors

Oxynitrides were grown on n- and p-type 6H-SiC by wet N/sub 2/O oxidation (bubbling N/sub 2/O gas through deionized water at 95/spl deg/C) or dry N/sub 2/O oxidation followed by wet N/sub 2/O oxidation. Their oxide/SiC interfaces were investigated for fresh and stressed devices. It was found that both processes improve p-SiC/oxide but deteriorate n-SiC/oxide interface properties when compared to dry N/sub 2/O oxidation alone. The involved mechanism could be enhanced removal of unwanted carbon compounds near the interface due to the wet ambient, and hence a reduction of donor-like interface states for the p-type devices. As for the n-type devices, incorporation of hydrogen-related species near the interface under the wet ambient increases acceptor-like interface states. In summary, wet N/sub 2/O oxidation can be used for providing comparable reliability for nand p-SiC MOS devices, and especially for obtaining high-quality oxide-SiC interfaces in p-type MOS devices.

Improved Interfacial Properties of Ge MOS Capacitor With High-k Dielectric by Using TaON/GeON Dual Interlayer

Ge MOS capacitors with tri-layer gate dielectric are proposed by using GeON interlayer, TaON sandwich layer, and HfTiON high-k dielectric. Very small capacitance equivalent thickness (0.79~0.91 nm) is achieved. Experimental results show that the NO pretreated sample exhibits the best electrical properties, such as low interface-state density (5.4 × 1011 cm-2 eV-1), low gate leakage current density (~ 3.16 × 10-4 Acm-2 at Vg - Vfb = 1 V) and high device reliability. All of these should be attributed to the facts that the NO nitridation could form a GeON interlayer with suitable N content and thus provide an excellent GeON/Ge interface with strong Ge-N bonds, while the TaON sandwich layer could separate Hf and Ge, thus effectively preventing the reaction between them and improving the interface quality and electrical properties of the devices.

Improved Electrical Properties of Ge p-MOSFET With

The electrical characteristics of germanium p-metal-oxide-semiconductor (p-MOS) capacitor and p-MOS field-effect transistor (FET) with a stack gate dielectric of HfO2/TaOxNy are investigated. Experimental results show that MOS devices exhibit much lower gate leakage current than MOS devices with only HfO2 as gate dielectric, good interface properties, good transistor characteristics, and about 1.7-fold hole-mobility enhancement as compared with conventional Si p-MOSFETs. These demonstrate that forming an ultrathin passivation layer of TaOxNy on germanium surface prior to deposition of high-k dielectrics can effectively suppress the growth of unstable GeOx, thus reducing interface states and increasing carrier mobility in the inversion channel of Ge-based transistors.

\hbox{HfO}_{2}

The effects of water vapor added in the N2 annealing of high-k HfTiON gate dielectric on Ge metal-oxide-semiconductor capacitor are investigated. Both transmission-electron microscopy and ellipsometry indicate that, as compared to dry-N2 annealing, the wet-N2 annealing can greatly suppress the growth of unstable low-k GeOx at the dielectric/Ge interface, thus resulting in smaller equivalent dielectric thickness, as well as less interface states and dielectric charges. All these are attributed to the hydrolyzable property of GeOx in water. Moreover, the wet-N2 annealed capacitor has ten times lower gate-leakage current due to its better dielectric morphology as confirmed by atomic force microscopy.

Gate Dielectric by Using

Correlation between created interface states and GIDL current increase in n-MOSFETs during hot-carrier stress is quantitatively discussed. A trap-assisted two-step tunneling model is used to relate the increased interface-state density (/spl Delta/D/sub it/) with the shift in GIDL current (/spl Delta/I/sub d/). Results show that under appropriate drain-gate biases, the two-step tunneling is so dominant that /spl Delta/I/sub d/ is insensitive to temperatures up to about 50/spl deg/C. With the help of 2-D device simulation, the locations of the drain region with significant two-step tunneling and the energy levels of the traps involved can be found, with both depending on the drain voltage. From these insights on /spl Delta/D/sub it/, /spl Delta/I/sub d/ and their relation, /spl Delta/D/sub it/ near the midgap can be estimated, with an error less than 10% as compared to the results of charge-pumping measurement on the same transistors. Devices with nitrided gate oxide, different gate-oxide thicknesses and different channel dimensions are also tested to verify the above correlation.

\hbox{TaO}_{x} \hbox{N}_{y}

Effects of preoxidation NH3 treatment on p-type 6H–SiC/SiO2 interface properties were investigated as compared to conventional thermally oxidized devices. It was found that NH3 treatment before oxidation can reduce the SiC/SiO2 interface states and fixed oxide charge. Furthermore, less shift of flatband voltage, and smaller increases of effective oxide charge and interface states during high-field stress were observed for the NH3 pretreated devices.