J. R. LaRoche

Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit

GaN high electron mobility transistors (HEMTs) were monolithically integrated with silicon CMOS to create a functional current mirror circuit. The integrated circuit was fabricated on 100 mm diameter modified silicon-on-insulator (SOI) wafers incorporating a resistive (111) silicon handle substrate and a lightly doped (100) silicon device layer. In a CMOS-first process, the CMOS was fabricated using the (100) device layer. Subsequently GaN was grown by plasma molecular beam epitaxy in windows on the (111) handle substrate surface without wire growth despite using gallium-rich growth conditions. Transmission lines fabricated on the GaN buffer/SOI wafer exhibited a microwave loss of less than 0.2 dB/mm up to 35u2009GHz. Direct current measurements on GaN HEMTs yielded a current density of 1.0u2009A/mm and transconductance of 270 mS/mm. At 10u2009GHz and a drain bias of 28u2009V, 1.25u2009mm long transistors demonstrated a small signal gain of 10.7 dB and a maximum power added efficiency of 53% with a concomitant power of 5.6 W...

A high performance differential amplifier through the direct monolithic integration of InP HBTs and Si CMOS on silicon substrates

We present results on the direct monolithic integration of III–V devices and Si CMOS on a silicon substrate. InP HBTs (0.5 × 5 um2 emitter) with ft and fmax ≫ 200GHz were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). A BCB based multilayer interconnect process was used to interconnect the InP HBT and Si CMOS to create a differential amplifier demonstration circuit. The heterogeneously integrated differential amplifier serves as the building block for high speed, low power dissipation mixed signal circuits such as ADCs and DACs.

AlGaN/GaN high electron mobility transistors on 100 mm silicon substrates by plasma molecular beam epitaxy

GaN high electron mobility transistor (HEMT) structures have been grown by plasma molecular beam epitaxy on 100 mm diameter ⟨111⟩ silicon substrates. Crack-free films with thicknesses of up to 1.7u2002μm were deposited without the use of strain-relaxing buffer layers. X-ray measurements indicate high structural uniformity and the Pendellosung oscillations are observed due to the abruptness of the AlGaN/GaN interface. Capacitance-voltage measurements display a sharp pinch-off with a depleted GaN buffer layer and no measurable charge accumulation at the substrate-epi interface. Transmission line measurements on the GaN HEMT buffer and substrate indicate a loss of less than 0.2 dB/mm up to 20 GHz. An average sheet resistance of 443u2002Ω/sq with a standard deviation of 0.8% and a mobility of 1600u2002cm2/Vu2009s were obtained for an Al0.25Ga0.75N/GaN HEMT. Transistors were fabricated with a current density of 1.2 A/mm and a transconductance of 290 mS/mm which is quite comparable to GaN HEMTs on SiC.

More Than Moore: GaN HEMTs and Si CMOS Get It Together

Advances in silicon technology continue to revolutionize microelectronics. However, Si cannot do everything and circuits based on other materials systems are required. What is the best way to integrate these dissimilar materials and enhance the capabilities of Si, thereby continuing the microelectronics revolution? In this paper, we summarize our results on the successful integration of GaN HEMTs with Si CMOS on a common silicon substrate using an integration/fabrication process similar to a SiGe BiCMOS process. Our GaN - Si CMOS process is being scaled to 200 mm diameter wafers and integrated with scaled CMOS and used to fabricate RF and mixed signals circuits with on-chip digital control/calibration. Thus, heterogeneous integration of GaN with Si CMOS enables a new class of high performance ICs that enhance the capabilities of existing systems, enable new circuit architectures and facilitate the continued proliferation of low cost microelectronics for a wide range of applications.

Progress and challenges in the direct monolithic integration of III–V devices and Si CMOS on silicon substrates

We present results on the direct monolithic integration of III–V devices and Si CMOS on a silicon substrate. Through optimization of device fabrication and material growth processes III–V devices with electrical performance comparable to devices grown on native III–V substrates were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). While the results presented here are for InP HBTs, our direct heterogeneously integration approach is equally applicable to other III–V electronic (FETs, HEMTs) and opto-electronic (photodiodes, VSCLS) devices and opens the door to a new class of highly integrated, high performance, mixed signal circuits.

Molecular beam epitaxial growth and properties of GaAs pseudomorphic high electron mobility transistors on silicon composite substrates

GaAs pseudomorphic high electron mobility transistor (PHEMT) structures were grown by molecular beam epitaxy on germanium substrates and composite silicon template wafers incorporating silicon and germanium transferred layers. Windows were etched down to the buried germanium layer and subsequent blanket material growth resulted in single crystal growth in the windows and polycrystalline growth on the top SiO2 surface. Wire growth was eliminated at the window edges and on the top SiO2 surface. Secondary ion mass spectrometry measurements and transmission electron micrographs of GaAs grown on germanium indicated an abrupt GaAs–Ge interface with little penetration of antiphase boundaries or other defects into the GaAs layer. For PHEMT material grown on silicon template wafers, a surface roughness of 8 A was measured by atomic force microscopy. The room temperature photoluminescence intensity of the InGaAs channel in the PHEMT structure was equivalent to that grown on GaAs substrates. Measured PHEMT mobilitie...

Thermal considerations for advanced SOI substrates designed for III-V/Si heterointegration

The thermal budget/integration challenges for SOLES have been investigated. A process window has been found that allows for the successful demonstration of a monolithically integrated III-V/Si differential amplifier. A method of increasing the integration flexibility of SOLES by introducing SiNx interlayers has been demonstrated. Future work will explore the increased thermal budget/integration flexibility of SOLES provided by incorporating embedded GaAs layers.

Monolithic III-V/Si integration

We summarize our work on creating substrate platforms, processes, and devices for the monolithic integration of silicon CMOS circuits with III-V optical and electronic devices. Visible LEDs and InP HBTs have been integrated on silicon materials platforms that lend themselves to process integration within silicon fabrication facilities. We also summarize research on tensile Ge, which could be a high mobility material for III-V MOS, and research on an in-situ MOCVD Al2O3/GaAs process for III-V MOS.