J. Stevenson Kenney

Efficiency Enhancement of Feedforward Amplifiers by Employing a Negative Group-Delay Circuit

We will demonstrate an alternative topology for the feedforward amplifier. This amplifier does not use a delay element, thus providing an efficiency enhancement and a size reduction by employing a distributed-element negative group-delay circuit. The insertion loss of the delay element in the conventional feedforward amplifier seriously degrades the efficiency. Usually, a high-power coaxial cable or a delay-line filter is utilized for a low loss, but the insertion loss, cost, and size of the delay element still act as a bottleneck. The proposed negative group-delay circuit removes the necessity of the delay element required for a broadband signal suppression loop. With the fabricated two-stage distributed-element negative group-delay circuit with 30 MHz of bandwidth and -9 ns of group delay for a wideband code-division multiple-access downlink band, the feedforward amplifier with the proposed topology experimentally achieved 19.4% power-added efficiency and -53.2-dBc adjacent channel leakage ratio with 44-dBm average output power.

An envelope elimination and restoration power amplifier using a CMOS dynamic power supply circuit

This paper presents a CDMA power amplifier using Kahn envelope elimination and restoration technique. A CMOS delta-modulated envelope amplifier with over 3MHz bandwidth is used as the dynamic power supply. Internal feedback was used on the envelope amplifier to reduce delay. A commercially available 1W GaAs/AlGaAs HFET power amplifier was tested in conjunction with the envelope amplifier. Using an IS-95 CDMA signal, a peak output power of 25 dBm was obtained at 836 MHz while achieving a maximum efficiency of 48% with ACPR of 47.9 dBc.

Adaptive predistortion linearization of RF power amplifiers using lookup tables generated from subsampled data

This paper discusses a new architecture for adaptive predistortion linearization of power amplifiers, whereby subsampled data (i.e. lower than Nyquist rate) from the input and output baseband waveforms is used to construct a lookup table. The technique utilizes a sampling downconverter that accurately captures a waveform sample in a narrow aperture before digitization. Because aliasing effects are the same for both input and output waveforms, information may be obtained regarding the amplitude and phase distortion characteristics of the power amplifier. The concept is validated using a test bed consisting of two sampling downconverters and a dual channel receiver. Results achieved indicate that 10-12 dB of adjacent channel power ratio (ACPR) improvement may be obtain using sampling rates as low as 33% of the Nyquist rate of the baseband output signal bandwidth.

Analytical Modeling of Microwave Parametric Upconverters

Parametric amplification is a well-studied phenomenon by which a nonlinear reactance mixes an RF large-signal (pump) with an IF small-signal (source) to generate mixing products with gain. In this paper, two analytical models are derived and validated that predict limitations in the gain and efficiency of a parametric upconverter associated with varactor tuning range and quality factor. The analytical models are validated by circuit simulations and by two breadboard upconverters.

Low-voltage ferroelectric phase shifters from L- to C-band and their applications

This paper describes the design, fabrication and test results of a family of integrated low-voltage ferroelectric phase shifters ranging in frequency of operation from 0.7 GHz to 6 GHz. All devices use a common material system of barium strontium titanate (BaxSr1-x TiO3 or BST) thin-films on a sapphire (Al2O 3) substrate. Thick copper (Cu) metallization is used to allow integration of ferroelectric varactors with high-Q inductors and other passive microwave elements. Novel bias structures have also been developed to reduce the voltages required to tune the materials to less than 20V. The flip-chip mounted devices measure less than 0.080 in. times 0.080 in.. Data for an all-pass network BST phase shifter shows that more than 100deg of differential phase shift may be obtained over a 30% fractional bandwidth. To demonstrate the utility of BST phase shifters, a two-element phased array antenna was designed and tested in conjunction with a wireless local area network (WLAN). Field tests showed that the data throughput of the WLAN was significantly improved in the presence of strong interference by use of the BST phased array antenna

Low-loss microelectrodes fabricated using reverse-side exposure for a tunable ferroelectric capacitor application

Narrowly spaced thick microelectrodes are fabricated using a self-aligned multiple reverse-side exposure scheme for an improved quality-factor tunable ferroelectric capacitor. The microelectrodes are fabricated on a functional substrate—a thin film ferroelectric (barium strontium titanate, BST; BaxSr1−xTiO3) coated sapphire substrate, which has an electric-field-dependent dielectric property providing tuning functionality, as well as UV transparency permitting an additional degree of freedom in photolithography steps. The microelectrode process has been applied to interdigitated capacitor fabrication, where a critical challenge is maintaining narrow gaps between electrodes for high tunability, while simultaneously forming thick electrodes to minimize conductor loss. A single mask, self-aligned reverse-side exposure through the transparent substrate achieves both these goals. A single-finger test capacitor with an electrode gap of 1.2 µm and an electrode thickness of 2.2 µm is fabricated and characterized. Tunability (T = 100 × (C0 − Cbias)/C0) of 33% at 10 V has been achieved at 100 kHz. The 2.2 µm thick structure shows improvement of Q-factor compared to that of a 0.1 µm thick structure. To demonstrate the scalability of this process, a 102-finger interdigitated capacitor is fabricated and characterized at 100 kHz and 1 GHz. The structure is embedded in a 25 µm thick epoxy resin SU-8 for passivation. A quality factor decrease of 15–25%, tunability decrease of 2–3% and capacitance increase of 6% are observed due to the expoxy resin after passivation. High frequency performance of the capacitor has been measured to be 15.9 pF of capacitance, 28.1% tunability at 10 V and a quality factor of 16 (at a 10 V dc bias) at 1 GHz.

Rotary Traveling-Wave Oscillator With Differential Nonlinear Transmission Lines

A methodology for the harmonic-balance analysis and design of rotary-traveling wave oscillator is presented. Two different implementations are compared. The first one is the standard configuration based on a distributed transmission lines. The second one is a new configuration based on a differential nonlinear transmission line (NLTL), which enables the generation of square waveforms with reduced number of stages, while still maintaining the capability to produce multiphase signals. The possible coexistence of oscillation modes is investigated with a detailed bifurcation analysis versus practical parameters such as the device bias voltage. The phase-noise spectrum is predicted from the variance of the common phase deviation. The parameters that determine this variance are identified with the conversion-matrix approach. The two prototypes, based on a distributed transmission line and a differential NLTL, have been manufactured and characterized experimentally, obtaining very good agreement between simulations and measurements.

Microdegree frequency and phase difference control using fractional-N PLL synthesizers

Two independently programmable on-chip delta-sigma fractional-N phased-locked loop (PLL) synthesizers were developed in 65 nm CMOS with a total die size of 2 mm × 2 mm to demonstrate a millidegree phase shifter. Both PLLs use a 24 bit fractional modulator, thus a theoretical phase shift as small as 21 microdegrees is possible. Due to limitations in the noise floor at microwave frequencies, data was collected at postdivided frequencies 50 MHz and 400 MHz resulting in a best case measured phase step of 21 millidegrees at 50 MHz with a high degree of measurement certainty.

A Novel Design of Frequency Multipliers Using Composite Right/Left Handed Transmission Line and Defected Ground Structure

A novel frequency multiplier using a composite right/left-handed transmission line and defected ground structure (DGS) is proposed. The left-handed transmission line (LH TL) in the proposed frequency multiplier suppresses the fundamental component (f0), while the dumb-bell or spiral shaped DGS diminish unwanted harmonics such as second, third, and fourth harmonic. The frequency multipliers are designed at f0 of 1 GHz by the proposed technique and measured results are presented. The measured output power at 2f0, 3f0, 4f0, is -3.77 dBm, -6.70 dBm, -6.58 dBm, respectively, when the fundamental input power is 0 dBm.

Harmonic ring oscillator time-to-digital converter

A simple yet high performance time-to-digital converter (TDC) architecture is proposed in this paper. Its key advantage is its ability to sample-and-hold a time interval and thereafter oversample the stored quantity to provide sub-gate delay resolution and high linearity. The converter is fully digital, synthesizable from standard logic cells, and owes its properties to the time storage mechanism which relies on injecting more than one signal edge into a ring oscillator and tracking their relative angle. Results from a prototype on FPGA reveal excellent noise suppression by achieving a single-shot precision of 0.05 times the unit inverting logic cell delay in the ring oscillator by using an oversampling ratio of 64.