J. Van der Spiegel

The extended gate chemically sensitive field effect transistor as multi-species microprobe☆

Abstract This paper describes a multi-species microprobe structure for potentiometric measurements and the appropriate patterning techniques of the chemically-sensitive membranes. The structures consists of an integrated coaxial cable whose signal line is connected to a high input impedance electrometer with the shield boot-strapped in order to reduce capacitive charging effects. The electrometer is an on-chip source follower, designed for minimum input capacitance. The coaxial line, which is an extension of the gate of the transistor, is fabricated with a triple poly-silicon NMOS process. The whole structure is compatible with current IC technology and allows integration of on-chip signal conditioning circuitry. Units of four element probes, each covered with a different membrane, have been fabricated. One important issue in multi-sensor fabrication is the deposition and patterning technique of the membranes. A scheme has been developed which allows successive patterning of both vacuum-deposited inorganics and spin coated polymers and gels. This technique has been successfully applied for a multi-species electrode of IRO 2 (H + ),AgCl(Cl - ) LaF 3 (F - ) and Ag.

A Foveated Retina-Like Sensor Using CCD Technology

A CCD imager whose sampling structure is loosely modeled after the biological visual system is described. Its architecture and advantages over conventional cameras for pattern recognition are discussed. The sensor has embedded in its structure a logarithmic transformation that makes it size and rotation invariant. Simulations on real images using the actual sensor geometry have been performed to study the sensor performance for 2D pattern recognition and object tracking.

A foveated silicon retina for two-dimensional tracking

A silicon retina chip with a central foveal region for smooth-pursuit tracking and a peripheral region for saccadic target acquisition is presented. The foveal region contains a 9/spl times/9 dense array of large dynamic range photoreceptors and edge detectors. Two-dimensional direction of foveal motion is computed outside the imaging array. The peripheral region contains a sparse array of 19/spl times/17 similar, but larger, photoreceptors with in-pixel edge and temporal on-set detection. The coordinates of moving or flashing targets are computed with two one-dimensional centroid localization circuits located on the outskirts of the peripheral region. The chip is operational for ambient intensities ranging over six orders of magnitude, targets contrast as low as 10%, foveal speed ranging from 1.5 to 10 K pixels/s, and peripheral ON-set frequencies from <0.1 to 800 kHz. The chip is implemented in a 2 /spl mu/m n-well CMOS process and consumes 15 mW (Vdd=4 V) in normal indoor light (25 /spl mu/W/cm/sup 2/). It has been used as a person tracker in a smart surveillance system and a road follower in an autonomous navigation system.

1.05-GHz CMOS oscillator based on lateral- field-excited piezoelectric AlN contour- mode MEMS resonators

This paper reports on the first demonstration of a 1.05-GHz microelectromechanical (MEMS) oscillator based on lateral-field-excited (LFE) piezoelectric AlN contourmode resonators. The oscillator shows a phase noise level of -81 dBc/Hz at 1-kHz offset frequency and a phase noise floor of -146 dBc/Hz, which satisfies the global system for mobile communications (GSM) requirements for ultra-high frequency (UHF) local oscillators (LO). The circuit was fabricated in the AMI semiconductor (AMIS) 0.5-¿m complementary metaloxide- semiconductor (CMOS) process, with the oscillator core consuming only 3.5 mW DC power. The device overall performance has the best figure-of-merit (FoM) when compared with other gigahertz oscillators that are based on film bulk acoustic resonator (FBAR), surface acoustic wave (SAW), and CMOS on-chip inductor and capacitor (CMOS LC) technologies. A simple 2-mask process was used to fabricate the LFE AlN resonators operating between 843 MHz and 1.64 GHz with simultaneously high Q (up to 2,200) and kt 2 (up to 1.2%). This process further relaxes manufacturing tolerances and improves yield. All these advantages make these devices suitable for post-CMOS integrated on-chip direct gigahertz frequency synthesis in reconfigurable multiband wireless communications.

Analytical and experimental studies of thermal noise in MOSFET's

An analysis of the channel thermal noise in MOSFETs based on the one-dimensional charge sheet model, is presented. The analytical expression is valid in the strong, moderate, and weak inversion regions. The body effect on the device parameters relevant to the thermal noise is discussed. A measurement technique as well as experimental results of P- and N-MOSFETs of a 1.2 /spl mu/m radiation hard CMOS process are presented. The calculated channel thermal noise coefficient /spl gamma/ as in i/sub d//sup 2///spl Delta/f=4kT /spl gamma/ g/sub do/, agrees well with experimental data for effective device channel length as short as 1.7 /spl mu/m. >

A focal plane visual motion measurement sensor

A motion detection algorithm, based on biological and computational models, for focal plane implementation has been developed. This Temporal Domain Optical Flow Measurement (TDOFM) algorithm uses computational components which have direct and compact electronic counterparts. It uses a binary image of zero-crossings, 2 level analog signals, the signs of spatiotemporal derivatives, 1-b multiplication and pulsewidths to measure image velocity. Compared to other IC visual motion detectors, this sensor represents the first instance of a robust, wideband and general purpose 2-D motion sensor which reports speed and direction explicitly, has a wide dynamic range and has a compact IC implementation. The front-end of the motion cells is an edge detection circuit which responds to 5-6 orders of magnitude of light intensity and produces near maximum outputs for contrasts as low as 40% in bright and dim ambient conditions. The theoretical velocity measurement dynamic range of the sensor is 4-5 orders of magnitude, and motion ranging over three orders of magnitude has been measured. The variation in the measured speed is less than 15% across 1- and 2-D implementations, multiple chips, cells and directions. The complete system, including the photoreceptors and edge detection circuits, consumes less than 0.4 mW per cell at /spl plusmn/3.5 V.

Nonparallel training for voice conversion based on a parameter adaptation approach

The objective of voice conversion algorithms is to modify the speech by a particular source speaker so that it sounds as if spoken by a different target speaker. Current conversion algorithms employ a training procedure, during which the same utterances spoken by both the source and target speakers are needed for deriving the desired conversion parameters. Such a (parallel) corpus, is often difficult or impossible to collect. Here, we propose an algorithm that relaxes this constraint, i.e., the training corpus does not necessarily contain the same utterances from both speakers. The proposed algorithm is based on speaker adaptation techniques, adapting the conversion parameters derived for a particular pair of speakers to a different pair, for which only a nonparallel corpus is available. We show that adaptation reduces the error obtained when simply applying the conversion parameters of one pair of speakers to another by a factor that can reach 30%. A speaker identification measure is also employed that more insightfully portrays the importance of adaptation, while listening tests confirm the success of our method. Both the objective and subjective tests employed, demonstrate that the proposed algorithm achieves comparable results with the ideal case when a parallel corpus is available.

A fast, low power amplifier, shaper and discriminator for high rate straw tracking systems

The ASD-8 is a bipolar integrated circuit that provides eight channels of amplifier, shaper and discriminator on a 2.8-mm by 4.7-mm silicon substrate. It is designed for use in the straw based central tracking system of the SDC detector. Competing requirements for short measurement time ( approximately=5 ns), good double pulse resolution ( approximately=20 ns), low power ( approximately=15 mW/channel), and low operational threshold ( approximately=1 fC) lead to the choice of a largely differential circuit that includes detector tail compensation. Tests of parts from a recent prototype run indicate excellent yield and stable operation with little or no internal crosstalk. >

An analog neural computer with modular architecture for real-time dynamic computations

A multichip analog parallel neural network whose architecture, neuron characteristics, synaptic connections, and time constants are modifiable is described. The system has several important features, such as time constants for time-domain computations, interchangeable chips allowing a modifiable gross architecture, and expandability to any arbitrary size. Such an approach allows the exploration of different network architectures for a wide range of applications, in particular dynamic real-world computations. Four different modules (neuron, synapse, time constant, and switch units) have been designed and fabricated in a 2- mu m CMOS technology. About 100 of these modules have been assembled in a fully functional prototype neural computer. An integrated software package for setting the network configuration and characteristics, and monitoring the neuron outputs has been developed as well. The performance of the individual modules as well as the overall system response for several applications was tested successfully. Results of a network for real-time decomposition of acoustical patterns are discussed. >

Reconfigurable CMOS Oscillator Based on Multifrequency AlN Contour-Mode MEMS Resonators

This paper reports on the first demonstration of a reconfigurable complementary-metal-oxide-semiconductor (CMOS) oscillator based on microelectromechanical system (MEMS) resonators operating at four different frequencies (268, 483, 690, and 785 MHz). A bank of multifrequency switchable AlN contour-mode MEMS resonators was connected to a single CMOS oscillator circuit that can be configured to selectively operate in four different states with distinct oscillation frequencies. The phase noise (PN) of the reconfigurable oscillator was measured for each of the four different frequencies of operation, showing values between -94 and - 70 dBc/Hz at a 1-kHz offset and PN floor values as low as -165 dBc/Hz at a 1-MHz offset. Jitter values as low as a 114-fs root mean square (integrated 12 kHz-20 MHz) and switching times as fast as 20 μs were measured. This first prototype represents a miniaturized solution (30 times smaller) over commercially available voltage-controlled surface-acoustic-wave oscillators and potentially has the advantage of generating multiple stable frequencies without the need of cumbersome and power-consuming phase-locked-loop circuits.