J. Vuori

A digital multistandard paging receiver

Many different paging systems exist. Therefore it is very desirable to be able to implement the paging receiver in a way that all major paging standards can be supported. In this paper, a software radio receiver architecture which uses a signal demodulation technique based on a complex digital phase-locked loop is presented. This kind of software radio receiver can easily handle multiple paging standards, and it can easily be implemented in VLSI using the well-known CORDIC algorithm.

A new wireless paging network architecture

Paging is a one-way telecommunication service providing the means to send an alert signal or a short message to a pager. Traditional wide-area paging systems are mainly based on wired data transfer from paging area controllers to the base stations. In this paper we present a novel method to implement paging networks. Conventional paging networks use normally leased land lines to send pages from the paging network controller to the base stations located all over the country. In many cases the cost of those land lines is prohibitive, and therefore alternatives must be found. The new paging architecture proposed in this paper consists of a satellite channel and of a packet radio channel. Both channels are unidirectional. Together these channels provide a bi-directional communication channel. A cost-effective solution is to use a time-divided part of the paging channel for the packet radio. This can be done only if the packet radio does not decrease too much the paging capacity. To enable high paging capacity the packet radio network has to be efficiently routed.