J.Y. Chen

Design consideration of emitter-base junction structure for InGaP/GaAs heterojunction bipolar transistor

An InGaP/GaAs heterojunction bipolar transistor (HBT) with an 50 /spl Aring/ undoped spacer and /spl delta/-doping sheet at base-emitter heterointerface is fabricated and studied. A common-emitter current gain of 280 and an offset voltage as small as 55 mV are obtained, respectively. This results show that high current gain and low offset voltage can be attained simultaneously without the passivation of emitter-base junction. From the experimental results, it shows that the potential spike is indeed reduced by the employment of an /spl delta/-doped layer and spacer simultaneously. On the other hand, theoretical consideration also shows that the potential spike is removed by inserting a /spl delta/-doping sheet between the emitter-base heterointerface.

On the InP/InGaAs double heterojunction bipolar transistor (DHBT) with emitter tunneling barrier and composite collector structure

An InP/InGaAs double heterojunction bipolar transistor (DHBT) with an undoped emitter tunneling barrier and composite collector structure is fabricated and studied. Due to the mass filtering effect for holes, a thin InP tunneling barrier can be used to replace the wide-gap emitter. Experimentally, an appropriate tunneling barrier thickness of 150 /spl Aring/ is employed to achieve good I-V characteristics. In addition, InGaAsP compositionally step-graded layers are introduced between the p/sup +/-InGaAs base and n/sup -/-InP collector. By modulating the bandgap energy of InGaAsP, the large base-collector (B-C) potential spike can be divided into several small spikes with lower barrier height. The 4000 /spl Aring/ InP collectors with InP/InGaAsP/InGaAs step-graded junction achieve high breakdown voltages of 14.6 V. A small offset voltage of 80 mV and a small saturation voltage of 1.8 V at the collector current level of 5 mA are obtained. Prior to the current gain fall-off caused by the self-heating effect, the step-graded DHBT has the current gain as high as 118 H at I/sub C/ = 30 mA and V/sub CE/ = 3V.

An InGaP/InGaAs/GaAs double channel pseudomorphic high electron mobility transistor (DC-PHEMT)

The device characteristics of a novel InGaP/InGaAs/GaAs double channel pseudomorphic high electron mobility transistor (PHEMT) are reported. The double InGaAs layers are used to increase the total channel thickness. Experimentally, a flat and wide transconductance and microwave operation regimes over 300 mA/mm are obtained. In addition, the compression of transconductance and frequency response are insignificant even operated at high forward gate-source voltage of +2.0 V. Therefore, the studied device provides the promise for microwave circuit applications.

On the n/sup +/-InGaAs/n-GaAs composite doped channel heterostructure field-effect transistor (CDC-HFET)

An interesting n/sup +/-InGaAs/n-GaAs composite doped channel heterostructure field-effect transistor (CDC-HFET) is fabricated and studied. In the n/sup +/-InGaAs/n-GaAs CDC structure, the narrow InGaAs layer is used to introduce the channel quantization effect. Thus, the effective energy-gap of InGaAs channel can be increased. In addition, the n-GaAs channel can improve the operation capability under higher electric field. Therefore, the impact ionization effect can be avoided. Experimentally, the studied device shows good DC and microwave dc performances with flat and wide operation regime.

InGaP/GaAs superlatticed resonant-tunneling transistor (SRTT)

In this presentation, we have fabricated and demonstrated a new InGaP/GaAs RTT device. The good transistor performances and an interesting three-terminal controlled multiple N-shaped NDR phenomena are observed at room temperature. In our proposed structure, a 5-period InGaP/GaAs superlattice is employed to serve the RT route and the confinement barrier for holes. Thus a high emitter injection efficiency and high current gain performance can be obtained.

A new GaInP/GaAs high-barrier gate and tri-step doped channel transistor

A high-barrier gate GaInP/GaAs doped channel field-effect transistor (DCFET) has been fabricated and studied. The /spl delta/(P/sup +/)GaInP layer is employed to offer a high conduction band offset for a good electron confinement and achieve a high valance band offset as a hole barrier. The active channel is triple-step doped to obtain high-barrier camel gate. A fabricated n/sup +/-GaAs//spl delta/(P/sup +/)GaInP/n-GaAs camel diode exhibits a barrier height larger than 1.2 eV and a very high breakdown voltage of 33 V. The measured transconductance is 140 mS/mm with a unity current gain frequency of 17 GHz for a 1/spl times/50 /spl mu/m/sup 2/ device.

High-breakdown and high-linearity Ga/sub 0.51/In/sub 0.49/P/In/sub 0.15/Ga/sub 0.85/As pseudomorphic HEMT

High-breakdown and high-linearity Ga/sub 0.51/In/sub 0.49/P/In/sub 0.15/Ga/sub 0.85/As pseudomorphic HEMTs have been fabricated successfully and demonstrated. A extremely high gate-to-drain breakdown voltage of 40 V is obtained by using a wide-gap Ga/sub 0.51/In/sub 0.49/P Schottky contact layer. For a 1 /spl mu/m-gate length device, the transconductance and output current density at room temperature are 90 mS/mm and 646 mA/mm, respectively. The measured f/sub T/ and f/sub max/ are 12 and 28.4 GHz, respectively. Therefore, the studied device shows a promise for microwave power applications.

Modeling and analysis of heterostructure-emitter and heterostructure-base transistors (HEHBTs)

Abstract In this article, we report the DC performances of heterostructure-emitter and heterostructurebase transistors (HEHBTs) by theoretical and experimental analysis. For comparison, the devices with abrupt and graded confinement layer are studied. An analytical model related to the elimination of the potential spike and the recombination components of base current is developed to explain the transistor performances. The experimental current gain of about 280 and 120 are achieved for the devices with abrupt and graded confinement layers, respectively. As a result the excellent confinement effect and negligible neutral recombination in confinement layer for the device with abrupt confinement layer, the current gain is high especially at low emitter-base (E-B) bias regime. Further, the valence band discontinuity (ΔEv) and the emitter injection efficiency are increased attributed to the insertion of InGaAs quantum well (QW) at base region. The offset voltages about of 100 mV are obtained resulted from the elimination of potential spike and low InGaAs surface recombination velocity.