Jack H. Linn

Electric force microscopy as a probe of active and passive elements of integrated circuits

Integrated circuit (IC) device structures and metal interconnects have been investigated with atomic force microscopy (AFM). Tapping mode AFM was used to acquire topographical data. The focus of this paper is on the electrostatic interaction between a metallized AFM tip and the sample surface in noncontact mode. By varying the tip potential to minimize the electrostatic force between the tip and the surface, we were able to quantitatively probe voltages in metal interconnects and planar resistors, as well as image pn junctions and trapped charges.

A reliability study of laser trimmed NiCr kerfs

Visually acceptable, laser-trimmed nickel-chromium (nichrome) resistors were investigated for electrical stability after microanalysis data showed residual material in the lazed area. Electrical testing indicates that the amount of residual material in the kerf does not related to resistor instability when the applied voltage is less than 5 V. Analytical data show that the laser energy used to trim the nichrome resistor is sufficient to physically and chemically disrupt the nichrome structure. The disruption of the nichrome results in a stable chemical equilibrium within the kerf. Residual material in the kerf, resulting from decreased laser power or focus, is not a condition that causes device instability.<<ETX>>

Investigation of the Dopant Distribution in thin Epitaxial Silicon Layers by Means of Spreading Resistance Probe and Secondary Ion Mass Spectrometry

In this paper, we examine the dopant distributions in 1.8 to 4 micron-thick boron- and phosphorus-doped epitaxial silicon layers. These layers were grown by chemical vapor deposition (CVD) on arsenic-, antimony-, or boron-doped (100)- and (111)-oriented substrates. We performed doping profile studies by means of local resistivity measurements using a spreading resistance probe (SRP). Chemical profiles of the dopants were also obtained using secondary ion mass spectrometry (SIMS).

An analytical investigation of seal ring solder voiding on IC packages

Abstract Seal ring voiding on solder sealed IC packages is discussed. Surface analysis data demonstrates that nickel oxide, which diffuses from an underlying nickel layer during high temperature processing, is a major cause of the seal ring solder voiding. Voids result from nonwelting of the solder to the gold plate due to the interference of the nickel oxide. A diffusion model is combined with kinetic data to predict nickel diffusion times as a function of gold plating thickness and processing conditions.

Analysis of gold films used in microcircuit chip-attachment

Abstract ESCA and SEM were used to evaluate various gold deposition methods and different backside die preparations on the adhesion of backside gold films. Results indicate that poor die-attachment yield is most likely caused by an intermediate SiO 2 film which forms between the silicon die and gold film. Data indicate that sputtered gold films are much better than vacuum evaporated films at preventing the formation of this intermediate oxide. Formation of the gold-silicon eutectic using a RTA immediately after the gold deposition allows vacuum evaporated films to perform as reliably as sputtered films.