Jae Don Lee

Tile-based path rendering for mobile device

In this paper, we present a tile-based path rendering scheme that provides a fast rendering on mobile device. Because legacy path rendering schemes have memory or computing intensive work, they do not provide an enough performance (fps) on mobile device. To get an acceptable performance, we propose using tile-based approach for path rendering on mobile device. The design goal of our scheme has two folds: 1) Minimize memory I/O, 2) Minimize computation. Because our scheme effectively reduces memory I/O and computation simultaneously, we can get an acceptable high performance of path rendering on mobile device.

Operating System Support for Procedural Abstraction in Embedded Systems

Procedural abstraction reduces code size by replacing repeated code fragments with call instructions to a subroutine that executes the repeated fragment. However, in order to build a subroutine, extra instructions are necessary to support the procedural call mechanism. In this paper, we present an operating system level technique which improves the space efficiency of a procedural abstraction-based code compaction technique. The call-related extra instructions are not used in the proposed technique because operating system routines implicitly supports the procedure call and return. The proposed technique consists of three execution modes including one applicable to ROM-based systems. The experimental results show the proposed technique reduces the code size significantly while increasing the execution time slightly

A software reproduction of virtual memory for deeply embedded systems

Both the hardware cost and power consumption of computer systems heavily depend on the size of main memory, namely DRAM. This becomes important especially in tiny embedded systems (e.g., micro sensors) since they are produced in a large-scale and have to operate as long as possible, e.g., ten years. Although several methods have been developed to reduce the program code and data size, most of them need extra hardware devices, making them unsuitable for the tiny systems. For example, virtual memory system needs both MMU and TLB devices to execute large-size program on a small memory. This paper presents a software reproduction of the virtual memory system especially focusing on paging mechanism. In order to logically expand the physical memory space, the proposed method compacts, compresses, and swaps in/out heap memory blocks, which typically form over half of the whole memory size. A prototype implementation verifies that the proposed method can expand memory capacity by over twice. As a result, large size programs run in parallel with a reasonable overhead, comparable to that of hardware-based VM systems.