Jae-Sang Ro

Supergrains produced by lateral growth using Joule-heating induced crystallization without artificial control

In Joule-heating induced crystallization, phase transformation can occur through solid-to-solid or liquid-to-solid phases, according to the input conditions of the pulsed power. It was observed that during a Joule-heating period of several tens of microseconds, randomly nucleated liquid seeds followed by rapid solidification in an amorphous matrix play an important role, especially for liquid-to-solid transformation. Meanwhile, under high-power input processing conditions, supergrains of greater than 5 μm in size were produced by lateral growth from the initial seeds without artificial control.

Kinetics of solid phase crystallization of amorphous silicon analyzed by Raman spectroscopy

Solid phase crystallization (SPC) of amorphous silicon films grown by low pressure chemical vapor deposition was conducted using a tube furnace in nitrogen ambient at temperatures ranging from 560 °C to 1000 °C. The transformed crystalline fraction shows typical sigmoidal curves as a function of annealing time using Raman analysis adopted in this work. Arrhenius plot of the measured incubation time does not fit to the straight line since SPC kinetics has strong temperature dependence and since the heating rate is slow when using a conventional heating method. The grain size decreases as the annealing temperature increases. It, however, is not sensitive to the annealing temperature beyond 800 °C, since SPC kinetics is complete during the period of heating-up according to Raman spectroscopy. It was observed that doping of impurity atoms affect the crystallization kinetics.

28.4L: Late‐News Paper: Millisecond Crystallization of Amorphous Silicon Film using Joule Heating

A novel crystallization technology for amorphous silicon film using Joule heating was attempted in this study. An electric field is applied to a conductive layer, underneath, or, above, a silicon film to induce Joule heating to generate intense heat in order to carry out crystallization of amorphous silicon. Power density was more than 1,000 watt/cm2 and heating rate was higher than 100,000°C/sec under typical conditions of the experiments. Crystallization was accomplished uniformly throughout the sample within a few tens of milliseconds of the heating demonstrating a possibility of a new crystallization route of amorphous silicon films.

A study of buried layer formation using MeV ion implantation for the fabrication of ULSI CMOS devices

Abstract A complementary metal oxide semiconductor (CMOS) retrograde twin well including a buried layer was fabricated using MeV ion implantation. A profiled retrograde twin well was fabricated using multiple MeV ion implantations by controlling ion energy and dose independently. For the formation of a buried layer 1.5 MeV B + implantation was conducted at various ion doses. MeV implanted buried layers were observed to show greatly improved characteristics of latchup suppression. Junction leakage current, however, showed a critical behavior as a function of ion dose. The density of secondary defects had no correlation with leakage current. Instead, threading dislocations were observed to be responsible for the leakage current. The gettering efficiency of background oxygen by secondary defects formed near the projected range ( R p ) seemed to be related to the formation of threading dislocations.

Activation and deactivation in heavily boron-doped silicon using ultra-low-energy ion implantation

A shallow p+∕n junction was formed using an ultra-low-energy implanter. Activation annealing exhibited both solid phase epitaxy, in which the sheet resistance dropped rapidly, and reverse annealing. Deactivation phenomena were investigated for the shallow source/drain junction based on measurements of the postannealing time and temperature following the rapid thermal annealing treatments. We found that the deactivation kinetics were divided into two regions. In the first region the rate of deactivation increased exponentially with the annealing temperature of up to 850°C. In the second region it decreased as the annealing temperature exceeded 850°C. We believe that the first region is kinetically limited while the second one is thermodynamically limited. In addition, we observed “transient enhanced deactivation,” an anomalous increase in the sheet resistance during the early annealing stage where the the temperatures were higher than 800°C. The activation energy for transient enhanced deactivation was mea...

A Study of Implanted BF2 as a Function of Wafer Temperature During Implant

The temperature effect for buried channel PMOS transistor characteristics was investigated. Generally, only dose, energy and implant angle have been considered as the major parameters for process matching between different high current implanters in transistor manufacturing. However, as the device is scaled down to sub‐100 nm size, additional parameters such as instantaneous dose rate and wafer temperature have become increasingly important for controlling the dopant profile by changing the annealing behavior of defects. The dose rate difference between ribbon and spot beam implanter was investigated through simulation and the wafer temperature difference was directly measured with special temperature measurement device. The peak height of both the boron and fluorine SIMS profiles corresponding to the location of the amorphous/crystalline (a/c) interface increased proportionally with increasing wafer temperature and to a lesser degree with increasing instantaneous dose rate. By increasing the wafer temper...

Temperature Distribution According to the Structure of a Conductive Layer during Joule-heating Induced Encapsulation for Fabrication of OLED Devices

Encapsulation is required since organic materials used in OLED devices are fragile to water vapor and oxygen. Laser sealing method is currently used where IR laser is scanned along the glass-frit coated lines. Laser method is, however, not suitable to encapsulating large-sized glass substrate due to the nature of sequential scanning. In this work we propose a new method of encapsulation using Joule heating. Conductive layer is patterned along the sealing lines on which the glass frit is screen printed and sintered. Electric field is then applied to the conductive layer resulting in bonding both the panel glass and the encapsulation glass by melting glass-frit. In order to obtain uniform bonding the temperature of a conductive layer having a shape of closed loop should be uniform. In this work we conducted simulation for heat distribution according to the structure of a conductive layer used as a Joule-heat source. Uniform temperature was obtained with an error of 5% by optimizing the structure of a conductive layer. Based on the results of thermal simulations we concluded that Joule-heating induced encapsulation would be a good candidate for encapsulation method especially for large area glass substrate.

Crystallization mechanisms of joule‐heating‐induced crystallization

Abstract In Joule‐heating‐induced crystallization, solid‐to‐solid or liquid‐to‐solid phase transformation could occur. It was found that novel physical phenomena that randomly nucleated liquid seeds, followed by rapid solidification in an amorphous matrix, during the Joule‐heating‐up period play an important role especially in liquid‐to‐solid transformation. Under some processing conditions, super‐grains sized 6–8 μm were produced by the lateral growth from the initial seeds, without any artificially control.

The Effect of Annealing Methods on Dopant Activation and Damage Recovery of Phosphorous ion Shower Doped Poly-Si

Ion-Shower-Doping장비 및

Dopant‐activation and damage‐recovery of Ion‐shower‐doped poly‐Si through PH3/H2 after furnace annealing

PH_/3M_2