Jaime H. Moreno

Matrix computations on systolic-type meshes: an introduction to the multimesh graph method

Systolic-type arrays use both the fine-grain parallelism and the regularity of matrix computations effectively. The multimesh graph method for deriving these arrays is systematic, flexible, and easy to use. >

Matrix Computations on Systolic-Type Arrays

List of Figures. List of Tables. 1. Introduction. 2. Systolic-Type Arrays for Matrix Algorithms. 3. Regularization of Matrix Algorithms. 4. Realization of Fixed-Size Arrays. 5. Partitioning by Cut-and-Pile. 6. Partitioned Realizations Using Coalescing. 7. A Linear Pseudo-systolic Array. 8. Mapping Matrix Algorithms. 9. Summary and Further Research.

Arrays For Partitioned Matrix Algorithms: Tradeoffs Between Cell Storage And Cell Bandwidth

A graph-based partitioning method for designing systolic arrays for matrix computations is extended to apply it to processing elements with a small local memory. The introduction of this memory produces a reduction in the cell communication bandwidth and facilitates the use of pipelining within cells. As a consequence, efficient arrays can be designed using the extended method combined with technological parameters that define the ratio between processor speed and communication bandwidth. The extended partitioning method also allows evaluating tradeoffs between linear and two-dimensional arrays. We illustrate the method using a cube-shaped canonical algorithm, which is communication and computation intensive, and triangularization by Givens rotations.

On partitioning the Faddeev algorithm

Partitioned schemes for computing the Faddeev algorithm are derived, using a graph-based methodology. Such implementations are obtained by performing transformations on the fully parallel dependence graph of the algorithm. Linear and two-dimensional structures are derived and evaluated in terms of throughput, I/O bandwidth, utilization of processing elements, and overhead due to partitioning. The partitioned implementation are compared with schemes previously proposed. It is shown that throughput of both the linear and two-dimensional arrays derived here tends to 3m/7n/sup 3/ for n*n matrices, where m is the number of cells and utilization tends to 1. A two-dimensional scheme that is more efficient and has less overhead than others previously proposed is derived. It is shown that for partitioned implementations with the same number of cells, a linear array performs better, its implementation is easier, and it is better suited for fault-tolerant capabilities than a two-dimensional one.<<ETX>>

Comments on "A systolic array for computing BA/sup -1/

An algorithm and a systolic array for computing BA/sup -1/ was presented by P. Comon and Y. Robert (see ibid., vol.ASSP-35, p.717-23, June 1987). A and B are n by n and p by n matrices, respectively. Such an array computes BA/sup -1/ in (4n+p-2) time units using n(n+1) processing elements (PEs). The commenters apply a graph-based method for the design of systolic arrays to such an algorithm. They systematically derive the original array and another array that performs the computation in the same time but using (n(n+1)/2+pn) units. For p >

MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs

The design of MAMACG, a software tool for automatically mapping an important class of matrix algorithms into mesh array computational graphs, is described. MAMACG is a concrete realization of the multimesh graph (MMG) method, implemented in Elk, a dialect of LISP with built-in X-graphics capabilities.<<ETX>>

Linear Array For Efficient Execution Of Partitioned Matrix Algorithms

We propose a class-specific linear array suitable for partitioned execution of matrix algorithms, which achieves high efficiency, exploits pipelining within cells in a simple manner, has off cells communication rate lower than computation rate, and has a small storage per cell (whose size is independent of the size of problems). This array is well suited to use the MMG method, a data-dependency graph-based mapping technique. The MMG method has capabilities to realize fixed-size data and partitioned problems as algorithm-specific arrays, and to map algorithms onto class-specific arrays. The array proposed here uses the mapping capabilities of the method, which combine coalescing and cut-and-pile as partition strategies. Mapping is illustrated using the LU-decomposition algorithm; results obtained from mapping other algorithms are also indicated. Performance estimates of the mappings show that, for example, LU-decomposition of a 2000 by 2000 matrix computed in a linear array with 100-cells, two operation units per cell in a 4-stage pipeline, and 50 [nsec] clock period (i.e., 4000 [Mflops]), achieves 87% efficiency (3480 [Mflops]). This performance is obtained while requiring communication among cells of only 5 [Mwords/sec] and peak external I/O bandwidth for the entire array also of 5 [Mwords/sec]. Moreover, for a problem of this size, the use of cut-and-pile leads to storage requirements of only 8000 words per memory module.