James Arthur Farrell
Hewlett-Packard
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Publication
Featured researches published by James Arthur Farrell.
IEEE Journal of Solid-state Circuits | 1998
James Arthur Farrell; Timothy Charles Fischer
The logic and circuits are presented for a 20-entry instruction queue which scoreboards 80 registers and issues four instructions per cycle in a 600-MHz microprocessor. The request logic and arbiter circuits that control integer execution are described in addition to a novel compaction scheme that maintains temporal order in the queue. The issue logic data path is implemented in 141000 transistors, occupying 10 mm/sup 2/ in a 0.35-/spl mu/m CMOS process.
Archive | 1998
Daniel L. Leibholz; Sven Eric Meier; James Arthur Farrell; Timothy Charles Fischer; Derrick R. Meyer
Archive | 2002
James Arthur Farrell; Sharon M. Britton; Harry R. Fair; Bruce Gieseke; Daniel L. Leibholz; Derrick R. Meyer
Archive | 1998
James Arthur Farrell; Bruce Gieseke
Archive | 2003
Timothy Charles Fischer; Daniel L. Leibholz; James Arthur Farrell
Archive | 1998
James Arthur Farrell; Bruce Gieseke
Archive | 1999
James Arthur Farrell; Timothy C. Fischer; Daniel Lawrence Leibholz; Bruce Gieseke
Archive | 1998
Daniel L. Leibholz; Sharon Marie Britton; James Arthur Farrell; Timothy Charles Fischer
Archive | 1999
Nevine Nassif; James Arthur Farrell; Dale Hayward Hall; Gill Watt
Archive | 2002
Nevine Nassif; Madhav Desai; James Arthur Farrell; Harry Ray Fair; Roy Badeau; Nicholas L. Rethman