James D. Scofield

4H-SiC DMOSFETs for High Speed Switching Applications

Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.

Oxygen-free dry etching of α-SiC using dilute SF6:Ar in an asymmetric parallel plate 13.56 MHz discharge

Etch rates of up to 2200 A/min have been achieved on hexagonal silicon carbide (SiC) using dilute mixtures of SF6:Ar in a standard 13.56 MHz asymmetric parallel plate discharge. Furthermore, these etch rates have been realized with excellent pattern anisotropy profiles of approximately 1 at pressures in the range of 100–350 mTorr and the SF6 fraction at or below 50%. An understanding of the mechanisms responsible for the high etch rates in this simple, dilute, gas mixture can be achieved by considering the electrical characteristics of the radio frequency plasma. The conditions defining maximum etch rates are associated with peak fluorine ion and/or radical production, and can be defined entirely in terms of the relative current–voltage phase shift leading to optimal plasma impedance conditions and ultimately to maximal power deposition into the plasma. In addition, this study shows that the pervasive practice of utilizing oxygenated gas chemistries for SiC etching is not required, as previously thought, ...

A Comparison of High Temperature Performance of SiC DMOSFETs and JFETs

High temperature characteristics of 4H-SiC power JFETs and DMOSFETs are presented in this paper. Both devices are based on pn junctions in 4H-SiC, and are capable of 300oC operation. The 4H-SiC JFET showed very predictable, well understood temperature dependent characteristics, because the current conduction depends on the drift of electrons in the bulk region, which is not restricted by traps in the MOS interface or at the pn junctions. On the other hand, in a 4H-SiC DMOSFET, electrons must flow through the MOS inversion layer with a very high interface state density. At high temperatures, the transconductance of the device improves and threshold voltage shifts negative because less electrons are trapped in the interface states, resulting in a much lower MOS channel resistance. This cancels out the increase in drift layer resistance, and as a result, a temperature insensitive on-resistance can be demonstrated. The performance of the two devices are compared, and a discussion of issues for their high temperature application is presented.

Electrical and Thermal Performance of 1200 V, 100 A, 200°C 4H-SiC MOSFET-Based Power Switch Modules

In this paper we report the electrical and thermal performance characteristics of 1200 V, 100 A, 200°C (Tj), SiC MOSFET power modules configured in a dual-switch topology. Each switch-diode pair was populated by 2 x 56 mm2 SiC MOSFETs and 2 x 32 mm2 SiC junction barrier Schottky (JBS) diodes providing the 100 A rating at 200°C. Static and dynamic characterization, over rated temperature and power ranges, highlights the performance potential of this technology for highly efficient drive and power conversion applications. Electrical performance comparisons were also made between SiC power modules and equivalently rated and packaged IGBT modules. Even at a modest Tj=125°C, conduction and dynamic loss evaluation for 20kHz, Id=100A operation demonstrated a significant efficiency advantage (38-43%) over the IGBT components. Initial reliability data also illustrates the potential for SiC technology to provide robust performance in harsh environments.

Development of 8 mΩ-cm2, 1.8 kV 4H-SiC DMOSFETs

8 mΩ-cm2, 1.8 kV power DMOSFETs in 4H-SiC are presented in this paper. A 0.5 μm long MOS gate length was used to minimize the MOS channel resistance. The DMOSFETs were able to block 1.8 kV with the gate shorted to the source. At room temperature, a specific onresistance of 8 mΩ-cm2 was measured with a gate bias of 15 V. At 150 oC, the specific onresistance increased to 9.6 mΩ-cm2. The increase in drift layer resistance due to a decrease in bulk electron mobility was partly cancelled out by the negative shift in MOS threshold voltage at elevated temperatures. The device demonstrated extremely fast, low loss switching characteristics. A significant improvement in converter efficiency was observed when the 4H-SiC DMOSFET was used instead of an 800 V silicon superjunction MOSFET in a simple boost converter configuration.

Improved 4H-SiC MOS interfaces produced via two independent processes : Metal enhanced oxidation and 1300°C NO anneal

Two previously reported MOS processes, oxidation in the presence of metallic impurities and annealing in nitric oxide (NO), have both been optimized for compatibility with conventional 4H-SiC DMOSFET process technology. Metallic impurities are introduced by oxidizing in an alumina environment. This Metal Enhanced Oxidation (MEO) yields controlled oxide thickness (tOX) and robustness against high temperature processing and operation while maintaining high mobility (69 cm2/Vs) and near ideal NMOS C-V characteristics. Raising the NO anneal temperature from 1175oC to 1300oC results in a 67% increase in the mobility to 49 cm2/Vs with a slight stretch-out in the NMOS C-V. Both processes exhibit a small 30% mobility reduction in MOSFETs fabricated on NA = 1x1018 cm-3 implanted p-wells. The low field mobility in the MEO MOSFETs is observed to increase dramatically with measurement temperature to 160 cm2/Vs at 150oC.

High-Temperature Operation of 50 A (1600 A/cm2), 600 V 4H-SiC Vertical-Channel JFETs for High-Power Applications

In this work we have demonstrated the high-temperature operations of 600 V/50 A 4HSiC vertical-channel junction field-effect transistors (VJFETs) with an active area of 3 mm2. Specific-on resistance (RONSP) in the linear region of a single die is less than 2.6 mW.cm2 while the drain-source current is over 50 A under a gate bias (VGS) of 3 V. A reverse blocking gain of 54 is obtained at gate bias ranging from -13 V to -23 V and drain-source leakage current (IRDS) of 200 μA. To demonstrate the use of SiC VJFETs for high-power applications, eight 3 mm2 SiC VJFETs are bonded in a high current 600-V module. RONSP in the linear region of these eight-paralleled SiC VJFETs is 2.8 mW.cm2 at room temperature and increased to 5.35 mW.cm2 at an ambient temperature of 175 °C in air, corresponding to a shift of 0.61%/°C from room temperature to 175 °C. Meanwhile, the forward current is over 360 A at room temperature and reduces to 188 A at 175 °C at drain-source bias (VDS) of 5.25 V and VGS of 3 V.

High-Temperature Static and Dynamic Reliability Study of 4H-SiC Vertical-Channel JFETs for High-Power System Applications

In this work we report the most recent high-temperature long-term reliability results of the 600 V/14 A, 4H-SiC vertical-channel junction field-effect transistors (VJFETs). Two groups (A and B) devices were subjected to different thermal and electrical stresses. One device (Group A) reached 12,000 hours of continuous switching without a single failure. Four devices in Group A were thermally stressed at 250 °C over 4,670 hours in air, for which standard deviation of the specific on-resistance (RONSP) in linear region at gate bias (VGS) of 3 V were < 4.1% throughout the entire duration time. The off-state characteristics were evaluated by high temperature reverse bias (HTRB) tests. Three devices (Group A) were biased at 50% rated BVDS at 250 °C for 2,278 hours. A higher reverse bias at 80 % rated BVDS was then applied to 14 devices (group B) at 200 °C for 1,000 hours. Variations of the leakage current were negligible throughout the entire HTRB test for all tested devices.

High Temperature DC-DC Converter Performance Comparison Using SiC JFETs, BJTs and Si MOSFETs

The performance and characterization of SiC JFETs and BJTs, used as inverter switching devices, in a 2 kW, high temperature, 33 kHz, 270-28 V DC-DC converter has been accomplished. SiC and Si power devices were characterized in a phase shifted H-bridge converter topology utilizing novel high temperature powdered ferrite transformer material, high temperature ceramic filter capacitors, SiC rectifiers, and 10 oz. 220oC polyimide printed circuit boards. The SiC devices were observed to provide excellent static and dynamic characteristics at temperatures up to 300oC. SiC JFETs were seen to exhibit on-resistance trends consistent with temperature-mobility kinetics and temperature invariant dynamic loss characteristics. SiC BJTs exhibited positive temperature coefficients (TCE) of VCE and negative β TCEs, with only a 2-fold increase in on-resistance at 300oC. Both SiC power devices possessed fast inductive switching characteristics with τon and τoff ~100-150 ns when driving the transformer load. The SiC converter characteristics were compared to Si-MOSFET H-bridge operation, over its functional temperature range (30-230oC), and highlights the superiority of SiC device technology for extreme environment power applications.

SiC JFET Power Modules for Reliable 250°C Operation

An all SiC 600V / 6 m hermetic half-bridge power module has been developed to operate at ambient temperatures of 200oC and with junction temperatures near 250oC. The modules use SiC trench JFET technology and can output over 100A at Tj=250oC. Double pulsed switching was performed up to temperatures of 150oC with a measured total switching energy of 0.73mJ