Sumi Krishnaswami

Comparison of Static and Switching Characteristics of 1200 V 4H-SiC BJT and 1200 V Si-IGBT

In this paper, static and switching characteristics of a 1200 V 4H-silicon carbide (SiC) bipolar junction transistor (BJT) at a bus voltage of 600 V are reported for the first time. Comparison was made between the SiC BJT and a 1200 V Si insulated gate bipolar transistor (IGBT). The experimental data show that the SiC BJT has much smaller conduction and switching losses than the Si IGBT. The SiC BJT also shows an extremely large reverse bias safe operation area, and no second breakdown was observed. This removes one of the most unattractive aspects of the BJT. The results prove that, unlike Si BJTs, BJTs in 4H-SiC are good competitors for Si IGBTs.

Drift-Free, 50 A, 10 kV 4H-SiC PiN Diodes with Improved Device Yields

The path to commericializing a 4H-SiC power PiN diode has faced many difficult challenges. In this work, we report a 50 A, 10 kV 4H-SiC PiN diode technology where good crystalline quality and high carrier lifetime of the material has enabled a high yielding process with VF as low as 3.9 V @ 100 A/cm2. Furthermore, incorporation of two independent basal plane dislocation reduction processes (LBPD 1 and LBPD 2) have produced a large number of devices that exhibit a high degree of forward voltage stability with encouraging reverse blocking capability. This results in a total yield (forward, 10 kV blocking, and drift) of >20% for 8.7 mm x 8.7 mm power PiN diode chips—the largest SiC chip reported to date.

High Temperature Characterization of 4H-SiC Bipolar Junction Transistors

This paper summarizes the recent demonstration of 3200 V, 10 A BJT devices with a high common emitter current gain of 44 in the linear region, and a specific on-resistance of 8.1 mΩ- cm2 (10 A at 0.90 V with a base current of 350 mA and an active area of 0.09 cm2). The onresistance increases to 40 mΩ-cm2 at 350°C, while the DC current gain decreases to 30. A sharp avalanche behavior was observed with a leakage current of 10 μA at a collector voltage of 3.2 kV.

Temperature dependence of the current gain in power 4H-SiC NPN BJTs

For 1-kV 30-A 4H-SiC epitaxial emitter n-p-n bipolar junction transistors, the dependences of the common-emitter current gain /spl beta//sub CE/ on the collector current I/sub C/ were measured at elevated temperatures. The collector-emitter voltage was fixed (at 100 V) to provide an active operation mode at all collector currents varying in a wide range from 150 mA to 40 A (current densities of 24-6350 A/cm/sup 2/). The maximum current gain was measured to be /spl beta//sub CEmax/=40(I/sub C/=7 A) at room temperature and /spl beta//sub CEmax/=32(I/sub C/=10 A) at 250/spl deg/C. The /spl beta//sub CE/-I/sub C/ dependences were simulated in terms of a model that takes into account the main processes affecting the current gain: 1) recombination in the emitter-base space charge region; 2) surface recombination; 3) crowding of the emitter current; 4) decrease in the emitter-injection coefficient at high-level injection; and 5) ionization of deep acceptors. The minority carrier lifetimes and surface recombination velocity were obtained by means of this simulation.

4H-SiC DMOSFETs for High Speed Switching Applications

Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.

Development of 10 kV 4H-SiC Power DMOSFETs

In this paper, we report power 4H-SiC DMOSFETs with a 10 kV blocking capability the highest reported blocking voltage for a switching device in SiC to this date. The devices utilized 115 μm thick n-type epilayers with a doping concentration of 6 x 10 14 cm -3 for drift layers. Three zone Junction Termination Extension (JTE) regions formed by boron ion-implantations were employed as edge termination for the devices, which reduced the sensitivity of blocking capability of the devices to process variations. The gate oxide layer was formed by thermal oxidation at 1200 o C, followed by an N2O anneal at 1300 o C. A peak effective channel mobility of 14.5 cm 2 /Vs and a threshold voltage of 10 V were measured from a test MOSFET with a W/L of 150 μm / 150 μm, which was built adjacent to the power DMOSFETs. A 4H-SiC DMOSFET with an active area of 4.2 x 10 -3 cm 2 showed a specific on-resistance of 236 mΩ-cm 2 at room temperature with a gate bias of 25 V. The device shows a leakage current of 70 μA, which corresponds to a leakage current density of 16 mA-cm -2 at a drain bias of 10 kV.

Progress in Silicon Carbide Power Devices

SiC materials and device technology has entered a new era with the commercialization and acceptance of 600 V/10 A and 1200 V/10 A Schottky Barrier Diodes (SBDs) in the marketplace. These diodes are finding applications in the Power Factor Correction (PFC) stage of Switch Mode Power Supplies (SMPS). SiC power MOSFETs with ratings of 800-1200 V up to 10 A will soon be commercially available. The next step is to integrate the SiC MOSFET and Schottky diodes in a power module for PFC and motor control applications. For high temperature applications, greater than 200°C, a bipolar switch such as a SiC BJT offers superior performance over the MOSFETs. The lack of gate oxide in the BJT offers better reliability at such extreme temperatures, in addition to the lowest combined switching and conduction losses.

Influence of Basal Plane Dislocation Induced Stacking Faults on the Current Gain in SiC BJTs

SiC BJTs show instability in the I-V characteristics after as little as 15 minutes of operation. The current gain reduces, the on-resistance in saturation increases, and the slope of the output characteristics in the active region increases. This degradation in the I-V characteristics continues with many hours of operation. It is speculated that this phenomenon is caused by the growth of stacking faults from certain basal plane dislocations within the base layer of the SiC BJT. Stacking fault growth within the base layer is observed by light emission imaging. The energy for this expansion of the stacking fault comes from the electron-hole recombination in the forward biased base-emitter junction. This results in reduction of the effective minority carrier lifetime, increasing the electron-hole recombination in the base in the immediate vicinity of the stacking fault, leading to a reduction in the current gain. It should be noted that this explanation is only a suggestion with no conclusive proof at this stage.

10 kV, 123 m/spl Omega/-cm/sup 2/ 4H-SiC power DMOSFETs

Power MOSFETs in 4H-SiC are very attractive for high voltage switching applications because of their low specific on-resistances and fast, temperature independent switching characteristics. We present our latest results in 10 kV 4H-SiC DMOSFET development - a specific on-resistance of 123 m/spl Omega//spl middot/cm/sup 2/ is demonstrated, which is a 42% reduction in specific on-resistance. This is the lowest specific on-resistance value ever reported for 10 kV class majority carrier switches.

A Comparison of High Temperature Performance of SiC DMOSFETs and JFETs

High temperature characteristics of 4H-SiC power JFETs and DMOSFETs are presented in this paper. Both devices are based on pn junctions in 4H-SiC, and are capable of 300oC operation. The 4H-SiC JFET showed very predictable, well understood temperature dependent characteristics, because the current conduction depends on the drift of electrons in the bulk region, which is not restricted by traps in the MOS interface or at the pn junctions. On the other hand, in a 4H-SiC DMOSFET, electrons must flow through the MOS inversion layer with a very high interface state density. At high temperatures, the transconductance of the device improves and threshold voltage shifts negative because less electrons are trapped in the interface states, resulting in a much lower MOS channel resistance. This cancels out the increase in drift layer resistance, and as a result, a temperature insensitive on-resistance can be demonstrated. The performance of the two devices are compared, and a discussion of issues for their high temperature application is presented.