James Gafford

Instability in Half-Bridge Circuits Switched With Wide Band-Gap Transistors

Wide band-gap (WBG) field-effect devices are known to provide a system-level performance benefit compared to silicon devices when integrated into power electronics applications. However, the near-ideal features of these switching devices can also introduce unexpected behavior in practical systems due to the presence of parasitic elements. The occurrence of self-sustained oscillation is one such behavior that has not received adequate study in the literature. This paper provides an analytical treatment of this phenomenon by casting the switching circuit as an unintentional negative resistance oscillator. This treatment utilizes an established procedure from the oscillator design literature and applies it to the problem of power circuit oscillation. A simulation study is provided to identify the sensitivity of the model to various parameters, and the predictive value of the model is confirmed by experiment involving two exemplary WBG devices: a SiC vertical-channel JFET and a SiC lateral-channel MOSFET. The results of this study suggest that susceptibility to self-sustained oscillation is correlated to the available power density of the device relative to the parasitic elements in the circuit, for which wide band-gap devices, to include SiC and GaN transistors, are in a class approaching that of the radio frequency domain.

Stability Considerations for Silicon Carbide Field-Effect Transistors

Owing to their very low intrinsic capacitance and on-resistance, silicon carbide FETs have been shown to produce poor dynamics in certain power electronics applications, particularly those based on the half-bridge configuration. This letter catalogs three separate phenomena that are observed in the context of such applications and provides a detailed treatment of the most troublesome of these behaviors: the occurrence of sustained oscillation at switch turn-off. This behavior is analyzed in the context of established oscillator design theory; both simulation and experimental results are shown to verify this analysis; and practical suggestions are made to application designers to manage this behavior.

Comparative analysis of commercially available silicon carbide transistors

Since the release of power SiC JFETs in 2008 and power SiC MOSFETs in 2011, there are now more choices of SiC power transistors than ever before available to industrial power electronics markets. To inform prospective users, this paper surveys critical factors influencing the adoption of silicon carbide transistors for a wide range of power electronics applications. Citing publicly available documents, the analysis uses five key factors to compare and contrast the industrial viability of existing SiC transistor technologies: performance, availability, reliability, adoptability, and affordability. Special attention is devoted to the SiC transistors currently available to the commercial market, and the aspects of these devices related to the viability criteria are discussed.

Assessment of "Normally On" and "Quasi On" SiC VJFET's in Half-Bridge Circuits

The successful development of the silicon carbide vertical junction field effect transistor (VJFET) has provoked discussion about the role of “normally on” devices in modern power electronics. In this paper we report on the application of trench SiC VJFETs with blocking voltages up to 1000 V and saturated drain currents up to 4 A that have been engineered to exhibit “normally on,” “normally off,” and “quasi-on” operation. “Normally on” is defined as drain current saturation at, or close to, zero gate bias. “Quasi-on” is defined by a zero gate bias drain current significantly reduced from the final saturated value, but still well above the leakage current observed at pinch off. The quasi-on state can be exploited to manage abnormal operation of a pure VJFET-switched half-bridge circuit without resorting to normally off devices. The flexibility afforded by exploiting the safe operating area of the quasi-on VJFET is illustrated with a design example involving a halfbridge circuit.

Evaluation of 1.2 kV, 100A SiC modules for high-frequency, high-temperature applications

Cumulative advances in substrate quality and device manufacturing yields over the past few years have paved the way for the commercial introduction of Silicon Carbide (SiC) power modules capable of supporting applications in the 10-20 kW load class and beyond. This paper investigates the suitability of one such module for high-frequency operation at elevated temperatures by leveraging a high-peak-current gate-drive circuit and careful management of parasitic-induced oscillations. Clamped-inductive load experiments have been carried out at elevated temperatures, and the results compared to published results for similar-scale prototype modules. This work demonstrates achievement of very fast slew rates and switching times; the resulting switching losses are 50-70% lower than figures reported in the literature for modules of this scale.

A multi-kilowatt high-frequency AC-link inverter for conversion of low-voltage DC to utility power voltages

In this paper the results from a prototype low voltage DC input (<30 VDC) kilowatt class high frequency parallel-loaded resonant AC-link inverter is described. This system delivers utility grade voltage-source power at electronically selectable 50, 60, or 400 Hz. Cycle-by-cycle bidirectional current flow reduces the need for intermediate energy storage and allows for operation in a wide range of power factor with passive stability. The high frequency AC link and voltage boost stage is comprised of a zero voltage, zero current switching full-bridge inverter. This soft switching high frequency inverter is well suited for handling the large currents expected from a low voltage source. The output inverter is connected directly to this high frequency AC-link and zero voltage switching is employed in the output inverter to eliminate switching loss. A discretized sinusoidal carrier wave modulation (DSCWM) algorithm is used to control the high frequency boost inverter. The switching frequency of the DSCWM algorithm is fixed in relation to the frequency of the resonant high frequency AC link. The discretization of the modulation algorithm allows for the high frequency link to be discontinuous thus improving the zero voltage switching of the inverter. The elimination of a rectifier stage and reduction of the intermediate energy storage delivers a high power density design when compared to conventional dc-dc-ac methods. While switching loss has been greatly minimized, AC resistance due to high frequency operation and large peak currents present must be addressed in the interconnections and magnetic design.

Control and characterization of electromagnetic emissions in wide band gap based converter modules for ungrounded grid-forming applications

Electromagnetic emissions of a 1.2kV, 120A SiC-based half-bridge switching at 100kHz that includes grounding paths and that can be extended to a 100kVA inverter and, eventually, systems of paralleled and cascaded inverters suitable for shipboard and solar farm applications is studied. This switching pole forms the basis of a test platform specifically designed to discover sensitivities to resonant paths so that design guidelines for peripheral structures and EMI mitigating components can be developed. Ungrounded grid-forming inverters are considered in this work because such systems present a worst case scenario when it comes to the effects of resonances through grounding paths being excited by “near-RF” frequencies associated with Wide Band Gap implementations.

High bandwidth energy storage devices for HEV/EV energy storage system

In a HEV or EV, analysis of the energy storage system (ESS) is often based on standard drive cycles sampled at a 1 Hz rate. The switching harmonics caused by the motor drive are well-known source of high-frequency harmonics on the ESS since perfect de-coupling using the capacitors native to the motor drive is not possible, but additional current harmonics flow between the 0.5 Hz (Nyquist frequency of sampling frequency) and the switching frequency because of the transient nature of load in automotive applications. This digest quantifies these harmonic currents, sizes high-bandwidth energy storage devices (ESDs) for ESS, and compares power loss reduction using measured RMS currents.

Active gate drive solutions for improving SiC JFET switching dynamics

Active and Non-Active Gate Drives (AGDs and NAGDs) are known for managing switching characteristics of silicon (Si) and silicon carbide (SiC) power semiconductors. As SiC adoption has grown, the need for intelligent gate drives which are capable of managing the dynamics associated with the fast-switching characteristics of these devices has become apparent. To propose a solution for managing driven and post-driven dynamic behavior, this paper first studies the most recent AGD solutions for silicon power semiconductors with focus on closed loop schemes. The study is continued by reviewing available AGD and NAGD solutions for silicon carbide power semiconductors concentrating on the SiC JFET. Oscillatory modes which can be observed in application circuits based on SiC devices are discussed, and an AGD design example is proposed for improving the final dynamic response of such circuits. The active gate drive design example is constructed, and both simulated and empirical results are shown to substantially reduce the occurrence of natural and forced oscillations at turn-off of the SiC JFET.

Power Supply on Chip (PwrSoC) model identification using black-box modeling techniques

With recent developments in power conversion technologies and market trends that are driving those technologies toward further miniaturization and greater integration, the need for an empirically based modeling methodology for proprietary power converters such as Power Supply on Chip (PwrSoC) products has risen significantly. This need motivates the investigation of black-box models, which require little or no knowledge of the internal workings of a system, for those areas of industry adopting PwrSoC technology as a point-of-load solution. This paper reports a black-box modeling method and the construction and validation of a large-signal averaged model for a specific commercially available PwrSoC product. The benefits of the approach reported in this paper include the computational advantages of averaged models in simulation and the availability of a simple procedure to create models for concept analysis and design evaluation of PwrSoC products without vendor supplied models or “white-box” information needed to create a circuit description of the part.