Michael S. Mazzola

Instability in Half-Bridge Circuits Switched With Wide Band-Gap Transistors

Wide band-gap (WBG) field-effect devices are known to provide a system-level performance benefit compared to silicon devices when integrated into power electronics applications. However, the near-ideal features of these switching devices can also introduce unexpected behavior in practical systems due to the presence of parasitic elements. The occurrence of self-sustained oscillation is one such behavior that has not received adequate study in the literature. This paper provides an analytical treatment of this phenomenon by casting the switching circuit as an unintentional negative resistance oscillator. This treatment utilizes an established procedure from the oscillator design literature and applies it to the problem of power circuit oscillation. A simulation study is provided to identify the sensitivity of the model to various parameters, and the predictive value of the model is confirmed by experiment involving two exemplary WBG devices: a SiC vertical-channel JFET and a SiC lateral-channel MOSFET. The results of this study suggest that susceptibility to self-sustained oscillation is correlated to the available power density of the device relative to the parasitic elements in the circuit, for which wide band-gap devices, to include SiC and GaN transistors, are in a class approaching that of the radio frequency domain.

Stability Considerations for Silicon Carbide Field-Effect Transistors

Owing to their very low intrinsic capacitance and on-resistance, silicon carbide FETs have been shown to produce poor dynamics in certain power electronics applications, particularly those based on the half-bridge configuration. This letter catalogs three separate phenomena that are observed in the context of such applications and provides a detailed treatment of the most troublesome of these behaviors: the occurrence of sustained oscillation at switch turn-off. This behavior is analyzed in the context of established oscillator design theory; both simulation and experimental results are shown to verify this analysis; and practical suggestions are made to application designers to manage this behavior.

Application of a Normally OFF Silicon Carbide Power JFET in a Photovoltaic Inverter

Conventional wisdom that the SiC JFET is only a normally on device has recently been superseded by the first practical normally off SiC JFET. This new true enhancement mode, three-terminal, pure-SiC design provides designers with a normally off solution that retains all the benefits of the normally on SiC JFET. With only a simple change in series gate impedance, the EM SiC JFET can be used with common IC drivers and is a drop-in replacement for current silicon power devices in most applications. The device characteristics for the normally off SiC JFET are superior to MOSFETs and IGBTs and offer the possibility of efficiency improvements from reduced conduction and switching losses. The work presented in this paper demonstrates the drop-in replacement of 4 IGBTs with 4 normally off SiC JFET in a commercially available solar inverter based on a full-bridge topology. While demonstration as a drop-in replacement device was the main goal, system efficiency for operation with each device was observed and compared and an immediate improvement observed for the SiC JFET.

Observation of the D‐center in 6H‐SiC p‐n diodes grown by chemical vapor deposition

The D‐center in 6H‐SiC is a boron‐related deep hole trap observed previously in LPE‐grown 6H‐SiC diodes. We report deep level transient spectroscopy (DLTS) measurements in which the D‐center signature is observed in high‐purity n‐ and p‐type epitaxial layers formed by chemical vapor deposition (CVD). An activation energy of 0.58 eV and a capture cross section between 1×10−14 cm2 and 3×10−14 cm2 was determined for this level. Even though the D‐center in these diodes is thought to arise from unintended trace contamination, we observed within the same diode a factor of twenty greater density of this level in the n‐type layer than in the p‐type layer, which is explained by a recently proposed site competition model for impurity doping during 6H‐SiC CVD growth.

Nanosecond optical quenching of photoconductivity in a bulk GaAs switch

Persistent photoconductivity in copper‐compensated, silicon‐doped semi‐insulating gallium arsenide with a time constant as large as 30 μs has been excited by sub‐band‐gap laser radiation of photon energy greater than 1 eV. This photoconductivity has been quenched on a nanosecond time scale by laser radiation of photon energy less than 1 eV. The proven ability to turn the switch conductance on and off on command, and to scale the switch to high power could make this semiconductor material the basis of an optically controlled pulsed‐power closing and opening switch.

Normally-Off SiC VJFETs for 800 V and 1200 V Power Switching Applications

This paper reports on the development of a normally- off 4H-SiC VJFET power switch technology suitable for drop in replacement in switching-mode power supplies (SMPS). The fabricated devices exhibited a low specific on-resistance (Ron-sp) measured at V_DS=1 V and V_Gs=2-5 V. The transistors designed for 800 V applications had R_ON-SP < 2.9 mOmegaldrcm² and R_ON-SP < 6.6 mOmegaldrcm² at 25degC and 200degC, respectively. The devices designed for 1200 V application had R_ON-SP < 4.3 mOmegaldrcm² at 25degC and R_ON-SP < 12.8 mOmegaldrcm² at 200degC. The total delay time of 73 ns was measured on a 1200 V device when switching from 600 V to 4.9 A with the gate bias ranging from 0 V to 2.75 V. The highest measured off-state drain voltage blocked by a 1200 V device at V_GS=0 V exceeded 1800 V with the total drain leakage of 1 mA.

GaAs photoconductive closing switches with high dark resistance and microsecond conductivity decay

Silicon‐doped n‐type gallium arsenide crystals, compensated with diffused copper, were studied with respect to their application as photoconductive, high‐power closing switches. The attractive features of GaAs:Cu switches are their high dark resistivity, their efficient activation with Nd:YAG laser radiation, and their microsecond conductivity decay time constant. In our experiment, electric fields as high as 19 kV/cm were switched, and current densities of up to 10 kA/cm2 were conducted through a closely compensated crystal. At field strengths greater than approximately 10 kV/cm, a voltage ‘‘lock‐on’’ effect was observed.

Power factor correction using an enhancement-mode SiC JFET

The conventional wisdom that the SiC JFET is a normally on device has recently been superseded by the first practical normally off SiC JFET. The new true enhancement mode, three-terminal, pure-SiC design provides designers with a normally off solution that retains all the benefits of the normally on SiC JFET. With a simple change in the series gate impedance, the EM SiC JFET can be used with common IC drivers and is a drop-in replacement for current power devices in most applications. Device characteristics are superior to MOSFETs and IGBTs and offer the possibility of efficiency improvements from reduced conduction and switching losses. The work presented in this paper demonstrates the drop-in replacement of an IGBT with a normally off SiC JFET in a PFC demo circuit. System efficiency using each device was observed and compared. An improvement was noted with the JFET as expected.

SiC JFET gate driver design for use in DC/DC converters

Even though there is increasing interest in silicon carbide (SiC) JFETs, the fact that they are most commonly normally on devices intimates some designers. Therefore it is important that appropriate gate driver circuits are also introduced to ease the negative concerns associated with a normally on device. By introducing inherently safe gate driver circuits specially designed for the SiC JFET, it will be possible to prove that designing applications using SiC JFETs is not as complicated as some may think. Therefore, this paper provides a follow-up to previous work that introduced an inherently-safe gate driver design for a buck converter. In this paper, another gate driver is introduced that is not only inherently-safe but also provides an isolated solution ideal for a variety of applications. This gate driver is a practical solution for driving both normally-on and enhancement mode SiC JFETs in virtually all power converter topologies

Cryogenic and high temperature performance of 4H-SiC vertical junction field effect transistors (VJFETs) for space applications

In this paper, we present an investigation on the different aspects of the performance of a 600V, 3A 4H-SiC vertical-trench junction field effect transistor (VJFET) at cryogenic and high temperatures. Some critical device physics related factors that affect the DC characteristics and switching performance of the device are explored. In particular, the experimental low-temperature performance of 4H-SiC VJFETs (down to 30K or -243/spl deg/C) is presented for the first time to our knowledge.