James Gregory Couillard

41.4: AMOLED based on Silicon-On-Glass (SiOG) Technology

We have demonstrated that the single crystalline silicon films on the glass substrates can be utilized in the conventional mass production lines. The single crystalline Si layers were transferred to the 370 mm × 470 mm glass substrates using Silicon-On-Glass (SiOG) technology. Using the thin film transistor backplanes made by conventional CMOS technology, 2.4″ qVGA AMOLED with integrated circuits were successfully fabricated. A completed 2.4″ qVGA AMOLED module shows wide viewing angle (> 170°) and 73% color gamut. The advantages of SiOG technology and its significances will be presented.

Reduction of Off-State Currents in Silicon on Glass Thin Film Transistor by Off-State Bias Stress

We have studied the impact of off-bias stress on the performance of thin film transistors (TFTs) fabricated on single crystalline silicon-on-glass substrates. The p-channel TFT transfer characteristics typically exhibit excellent on-state performance with a field-effect mobility of 203 cm 2 /V s and a subthreshold swing of around 200 mV/dec. However, the off-state drain current has increased with increasing gate voltage. This increasing off-state current phenomenon can be significantly reduced by performing an off-state bias for 10 s. The formation of electron traps in the gate oxide near the drain is the main factor that reduces the off-state leakage current.

Silicon-on-Glass (SiOG) substrate technology: Process and materials properties

This paper is an introduction to a new Silicon-on-Glass substrate technology. The fabrication process and material properties of SiOG are presented. The semiconductor film has good electrical properties, comparable to other SOI technologies, and is strongly attached to a large area transparent substrate via an in-situ barrier layer compatible with FPD processing.

Boron and Phosphorus Implantation Induced Electrically Active Defects in p-Type Silicon

Electrically active defects induced by ion implantation of boron and phosphorus into silicon and their recovery under isothermal annealing at 450 °C were investigated using Deep Level Transient Spectroscopy (DLTS) and Energy Resolved Tunneling Photoconductivity (ERTP) spectroscopy at cryogenic temperatures. DLTS results show electrically active deep traps located at Ev+0.35 eV and Ev+0.53 eV in boron implanted Si and at Ev+0.34 eV, Ev+0.43 eV, and Ev+0.38 eV in phosphorus implanted Si. These meta-stable defect sites were found to be either eliminated or significantly reduced in thermally annealed samples. We assigned these defect sites to hydrogen and carbon incorporated complexes formed during ion implantation. Corroborating the DLTS results, the photocurrent measurement also revealed a strong reduction of electrically active defects states, extended from EC – 0.3 eV up to the conduction band edge of Si, upon isothermal annealing.

Investigation of Ion implantation induced electrically active defects in p-type silicon

We investigated ion implantation induced electrically active defects in p-type silicon using Deep Level Transient Spectroscopy (DLTS) and photoconductivity spectroscopy at cryogenic temperatures. Implantation related deep traps in H2, B11, and P31 implanted p-type Si and their recovery under isothermal annealing are described. We observed distinct deep trap levels located in the energy range between 0.25 eV up to 0.53 eV away from the valence band edge, which was either suppressed or eliminated upon thermal annealing below 600 °C. Supporting the DLTS results, photoconductivity shows strong recovery of a broad absorption band present near the conduction band edge upon thermal annealing. In this paper, we discuss the origin of the broad photoconductivity absorptions and DLTS emission in Si and their relation to the ion implantation induced damage to the lattice structure.

Demonstration of low temperature CMOS devices on SiOG and SOI substrates

The fabrication and analysis of CMOS devices fabricated on Silicon-on-Glass (SiOG) and compared to SOI (SIMOX) substrates are presented. Key aspects of the low temperature (≪ 600 °C) fabrication process are described. The devices from the SiOG substrate were observed to be comparable to those fabricated on SOI (SIMOX) with respect to carrier mobility and off-state leakage current. SiOG is viewed as a platform with potential applications in advanced flat panel mobile display modules as well as low-cost, medium performance ASICs.