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Dive into the research topics where James Juen Hsu is active.

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Featured researches published by James Juen Hsu.


international electron devices meeting | 1994

Flash EPROM endurance simulation using physics-based models

J. Peng; Sameer Haddad; Hao Fang; Chi Chang; S. Longcor; B. Ho; Yu Sun; David K. Y. Liu; Yuan Tang; James Juen Hsu; Shengwen Luan; Jih Lien

A novel unified field-dependent oxide charge generation (FDG) model is introduced to consistently simulate oxide degradation due to Fowler Nordheim (FN) tunneling and hot carrier injection (HCI) stresses over a wide range of oxide field intensity. This model, combined with an interface charge generation model, is used to study effects of stress-induced interface and oxide charges on flash device erase and programming speeds, band-to-band tunneling leakage current, and threshold voltage shift. An efficient cycle-weighting method is introduced to simulate flash device programming/erase (P/E) cycle endurance. Excellent agreement has been achieved between the simulation predications and experimental data over various operation conditions without parameter fittings or preassumed interface and oxide charge distributions. Simulation results show that the endurance characteristics are mainly affected by both the P/E gate current reduction due to oxide charges and the flat-band voltage increase due to both oxide and interface charges.<<ETX>>


international electron devices meeting | 1995

Short channel enhanced degradation during discharge of flash EEPROM memory cell

Jian Chen; James Juen Hsu; Shengwen Luan; Yuan Tang; David K. Y. Liu; Sameer Haddad; Chi Chang; S. Longcor; Jih Lien

A new mode of channel length dependent degradation due to band-to-band tunneling current during the discharge of short channel flash memory device is discussed. The degradation is due to the holes created by band-to-band tunneling current and accelerated by the lateral electric field. The holes gain enough energy, are injected into the oxide and cause damage. The amount of degradation increases significantly as channel length decreases. This could be a fundamental limitation to the scaling of flash memory cells. A new discharge method is proposed to inhibit the hot hole injection and to obtain precise discharged Vt control.


international symposium on vlsi technology systems and applications | 1993

Simulation of read-disturb lifetime reduction in submicron EPROM devices

Zezhong Peng; James Juen Hsu; Bill Liu; Ming Kwan; Steve Longcor; Jeffrey Frey

An accurate and efficient physical simulation method, based on a 2-D energy transport model and Monte Carlo calculated hot electron energy distribution, has been used to simulate the read-disturb lifetime reduction of deep-submicron EPROM devices. This method has been validated by data of a 0.5 mu m EPROM technology and used to predict the read disturb lifetime for the 0.35 mu m technology generation.<<ETX>>


Archive | 1995

Nonvolatile memory cell formed using self aligned source implant

Hsingya Arthur Wang; James Juen Hsu


Archive | 1995

Nonvolatile memory cell with vertical gate overlap and zero birds beaks

James Juen Hsu; Steven W. Longcor; Jih-Chang Lien


Archive | 1995

Self-aligned buried channel/junction stacked gate flash memory cell

James Juen Hsu


Archive | 1995

Method of making nonvolatile memory cell with vertical gate overlap and zero birds' beaks

James Juen Hsu; Steven W. Longcor; Jih-Chang Lien


Archive | 1990

Process for producing optimum intrinsic, long channel, and short channel mos devices in vlsi structures

James Juen Hsu; Yowjuang W. Liu


Archive | 1995

PROCESS FOR SELF-ALIGNED SOURCE FOR HIGH DENSITY MEMORY

James Juen Hsu; Steven W. Longcor


Archive | 1989

Method of forming and removing polysilicon lightly doped drain spacers

Lewis Shen; Zahra Hadjizadeh-Amini; Hsingya A. Wang; James Juen Hsu

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Yuan Tang

Advanced Micro Devices

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Jian Chen

Advanced Micro Devices

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Lewis Shen

Advanced Micro Devices

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Chi Chang

Advanced Micro Devices

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Jih Lien

Advanced Micro Devices

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