James M. Daughton

70% TMR at room temperature for SDT sandwich junctions with CoFeB as free and reference Layers

Spin dependent tunneling (SDT) wafers were deposited using dc magnetron sputtering. SDT junctions were patterned and connected with one layer of metal lines using photolithography techniques. These junctions have a typical stack structure of Si(100)-Si/sub 3/N/sub 4/-Ru-CoFeB-Al/sub 2/O/sub 3/-CoFeB-Ru-FeCo-CrMnPt with the antiferromagnet CrMnPt layers for pinning at the top. High-resolution transmission electron microscopy (HRTEM) reveals that the CoFeB has an amorphous structure and a smooth interface with the Al/sub 2/O/sub 3/ tunnel barrier. Although it is difficult to pin the amorphous CoFeB directly from the top, the use of a synthetic antiferromagnet (SAF) pinned layer structure allows sufficient rigidity of the reference CoFeB layer. The tunnel junctions were annealed at 250/spl deg/C for 1 h and tested for magneto-transport properties with tunnel magnetoresistive (TMR) values as high as 70.4% at room temperature, which is the highest value ever reported for such a sandwich structure. This TMR value translates to a spin polarization of 51% for CoFeB, which is likely to be higher at lower temperatures. These junctions also have a low coercivity (Hc) and a low parallel coupling field (Hcoupl). The combination of a high TMR, a low Hc, and a low Hcoupl is ideal for magnetic field sensor applications.

The design of a one megabit non-volatile M-R memory chip using 1.5*5 mu m cells

A 10/sup 6/-bit chip has been designed using 1.5- mu m magnetoresistive double-layer memory elements and bipolar circuitry. The bipolar circuitry is based on nominal 1.25- mu m optical lithography. The total chip area of the design is 8.5 mm*9.5 mm. To enhance the signal-to-noise ratio, multiple reads are used with the nondestructive readout cells. Design read time is 3 mu s. Design write time is 0.2 mu s. The design includes three redundant, fuse-selectable sense lines for each group of 32 sense lines. If the bit failure rate is 0.0005 or less, yield loss for the 10/sup 6/-bit chip due to sense line failure is less than 19%. With improved lithography, elements as small as 0.75 mu m*2.5 mu m could be made from the material. >

Magnetostriction effect of amorphous CoFeB thin films and application in spin-dependent tunnel junctions

CoFeB thin films and magnetic tunnel junctions using them are studied for magnetostriction effect. The single-layer films were sputter deposited with excellent soft magnetic properties including a high saturation magnetization of 1.5T, a near-zero hard axis coercivity, a low easy axis coercivity of 2.0Oe, and an induced magnetic anisotropy field of 32Oe. The saturation magnetostriction constant is measured to be 31ppm. Magnetic tunnel junctions (MTJs) were fabricated and tested for potential strain gauge applications. The gauge factor for the magnetostrictive MTJs, a measure of strain sensitivity, is many times of the best piezoresistive devices.

Spin dependent tunneling junctions with reduced Neel coupling

A new structure of spin dependent tunneling (SDT) junctions has been demonstrated to have a much reduced Neel coupling field between the free and pinned ferromagnetic layers comparing with conventional SDT structures. The new structure consists of a modified synthetic-antiferromagnetic composite layer as the pinned layer with two Ru spacer layers and three ferromagnetic layers. The Neel coupling field is much reduced for both top- and bottom-pinned SDT structures using this new composite pinned layer. Furthermore, the net magnetic moment is kept at zero for the composite pinned layer to minimize the fringe field after patterning. The coupling reduction can be understood by considering the additive contribution from the first two interfaces with Ru in the composite pinned layer, which cancels that from the pinned layer interface with the barrier. By properly spacing these three most important interfaces, reducing the coupling to basically zero is realized. The coupling reduction allows the elimination of a...

Effect of Resistance-Area-Product and Thermal Environment on Writing of Magneto-Thermal MRAM

Blocking temperature written magnetic random access memory element test structures of various sizes and tunnel barrier resistance area products were fabricated in order to study the dependence of writing efficiency and tunnel junction integrity on the thermal environment of the memory element and tunnel junction resistance area product. The test structures were programmed using a CPP writing mode, where the device is heated by passing a small current through the tunnel junction. The device is then field cooled to set the direction of an IrMn/NiFeCo storage layer. Quasistatic write current was measured as a function of resistance area product and for underlayers with differing thermal conductivities. Linear fits to the size dependent write current data suggest that properly designed submicron bits can be written quasistatically at <100 mu A. Write current for a fixed thermal environment was found to depend inversely on resistance product, but too large a resistance area product causes the tunnel barriers to fail before the memory element can be heated above the blocking temperature of the storage layer. In addition, if the thermal conductivity between the magnetic tunnel junction and substrate is too small, the magnetic tunnel junction will fail before the blocking temperature is reached, even at very low resistance area product values. Proper device design should thus optimize cell thermal resistance and tunnel junction resistance for both reliability and minimum power consumption

Magnetoresistive memories - analogies with ferroelectrics

Both Honeywells Magnetoresistive Random Access Memory (MRAM) technology and its antecedent, a magnetoresistive memory invented by Len Schwee1, are fortunate to use common magnetic materials which are relatively stable and easy to fabricate. Magnetoresistive material properties, the MRAM cell operation (bit selection, writing and reading), general circuit strategies, and packaging are described. Analogies and comparisons with ferroelectric memory material and cell operation are discussed. Both ferroelectric memory and MRAM can fill important (and different) product niches, but both require material developments in order for them to achieve general-purpose usage: the ferroelectric material must overcome fatigue and the MRAM must overcome a small signal level. Other less significant materials developments are also needed. Once the proper material is available, a surprisingly long development cycle is needed to get products through design, process start-up, reliability tests, and (for rad hard products) radi...

Analysis of 60nm diam spin dependent tunneling memory cells with thermally assisted writing

An analysis has been performed for spin dependent tunneling memory cells with a 5nm thick pinned, storage magnetic layer with a 60nm diam and with a saturation magnetization of 1000emu∕cm3. In reading, the required pinning fields plus anisotropy fields for the cases of with and without error correction were found to be 79 and 108Oe. The required total fields for writing for the cases with and without error correction were calculated to be 93 and 129Oe. The write current needed to provide the total, effective, 129Oe write field was calculated to be 1.1mA for the assumed word line structure. The needed heating current through the tunnel cell was calculated to be 41μA assuming a tunnel junction and an added resistive layer. A multiple sample read mode with an autozero step and a word read field requires word read currents of 2.50 and 2.75mA. The multisample, autozero mode has wider margins. If the semiconductor selection matrix can be placed underneath the cells, the calculated cell is 0.022μm2.

Effect of Memory Element Resistance-Area-Product and Thermal Environment on Writing of Magneto-Thermal MRAM

This work focuses on an experimental study of the effect of the thermal environment and the resistance area product (RA) of an magnetic tunnel junction (MTJ) on the MTJ reliability and minimum required heating current of CPP thermally written magnetic random access memory (MRAM). Proper device design should optimize cell thermal resistance and MTJ RA for both reliability and minimum power consumption.

Thermally Assisted Writing of Cells with IrMn Pinning Using 27 Nanosecond Pulses

The very small and dense SDT memory cells arrays can be achieved with SDT memory cells in which the information is stored in the direction of the IrMn low blocking temperature. To demonstrate the durability and stability of the written IrMn antiferromagnetic pinning, a variety of test were conducted. For simplicity in fabrication, the test were conducted with just spin valve cells rather SDT cells. The high speed writing tests were conducted on a variety of spin valve memory cells with 60 Angstrom thick IrMn pinning. Cells were continuously written up to 10 trillion times with 27 nanosecond write pulses at a 9 MHz rate. The amplitude for the pulses was chosen so a single pulse provided sufficient heating or annealing to reverse the pinning. The measured time constant for heating and cooling of the cells was found to be 9+-2 nanoseconds. The tests on the limited number of samples suggests that the cells can be written indefinitely with adequate performance.