James R. Vash | Researchain

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Featured researches published by James R. Vash.

Archive | 2012

Dynamically controlling interconnect frequency in a processor

Malini K. Bhandaru; Ankush Varma; James R. Vash; Monica Wong-Chan; Eric J. DeHaemer; Christopher Allan Poirier; Scott P. Bobholz

Archive | 2008

Satisfying memory ordering requirements between partial reads and non-snoop accesses

Robert Beers; Ching Tsun Chou; Robert J. Safranek; James R. Vash

Archive | 2009

Core snoop handling during performance state and power state transitions in a distributed caching agent

James R. Vash; Rishan Tan

Archive | 2012

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

Herbert H. J. Hum; Brinda Ganesh; James R. Vash; Ganesh Kumar; Leena K. Puthiyedath; Scott J. Erlanger; Eric J. DeHaemer; Adrian C. Moga; Michelle M. Sebot; Richard L. Carlson; David Bubien; Eric Delano

Archive | 2012

TUNNELING PLATFORM MANAGEMENT MESSAGES THROUGH INTER-PROCESSOR INTERCONNECTS

Luke Chang; Mahesh S. Natu; James R. Vash; Michelle M. Sebot; Robert J. Safranek

Archive | 2010

System-wide quiescence and per-thread transaction fence in a distributed caching agent

James R. Vash; Bongjin Jung; Rishan Tan

symposium on vlsi circuits | 2009

A 45nm 24MB on-die L3 cache for the 8-core multi-threaded Xeon ® Processor

Jonathan Chang; Szu-Liang Chen; Wei Chen; Siufu Chiu; Robert W. Faber; Raghuraman Ganesan; Marijana Grgek; Venkata Lukka; Wei Wing Mar; James R. Vash; Stefan Rusu; Kevin Zhang

Archive | 2009