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James S. Blomgren

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Publication

Featured researches published by James S. Blomgren.

Archive | 1994

Emulating operating system calls in an alternate instruction set using a modified code segment descriptor

David E. Richter; Jay C. Pattin; James S. Blomgren

Archive | 1996

Debug and video queue for multi-processor chip

Brian R. Baird; David E. Richter; Shalesh Thusoo; David M. Stark; James S. Blomgren

Archive | 1996

Multi-processor DRAM controller that prioritizes row-miss requests to stale banks

Jay C. Pattin; James S. Blomgren

Archive | 1994

Dual-instruction-set architecture CPU with hidden software emulation mode

James S. Blomgren; David E. Richter

Archive | 1994

Shared register architecture for a dual-instruction-set CPU

James S. Blomgren; David E. Richter

Archive | 1996

Merge/mask, rotate/shift, and boolean operations from two instruction sets executed in a vectored mux on a dual-ALU

Earl T. Cohen; James S. Blomgren; David E. Richter

Archive | 1992

Microprocessor with operation capture facility

James S. Blomgren; Jimmy E. Bracking; David E. Richter; Francis Spahn

Archive | 1994

Master-slave cache system for instruction and data cache memories

Earl T. Cohen; Russell W. Tilleman; Jay C. Pattin; James S. Blomgren

Archive | 1994

Block-based branch prediction using a target finder array storing target sub-addresses

James S. Blomgren; Earl T. Cohen; Brian R. Baird

Archive | 1995

Temporal re-alignment of a floating point pipeline to an integer pipeline for emulation of a load-operate architecture on a load/store processor

James S. Blomgren; Cheryl Senter Brashears

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Earl T. Cohen

Cisco Systems

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Brian R. Baird

Conexant

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