Jamil Akhtar

A Digital Hygrometer for Trace Moisture Measurement

A microcontroller-based digital hygrometer system using a low-cost moisture sensor in the range of 3.7-100 ppm has been developed. The sensor is of capacitive type and consists of nanoporous thin film of alumina (γ - Al2O3) dip coated in between two parallel gold electrodes onto an alumina substrate. The behavior of the sensor has been modeled with an object to develop a signal processing circuit to convert capacitance change into frequency. The detection electronics circuit is based on a relaxation oscillator whose output is suitable for interfacing with a digital device. The sensor has been characterized with the circuit and then output frequency is calibrated in terms of ppm. The accuracy of the digital hygrometer when compared with the commercial dew point meter is found to be ±1 PPM.

Silver Nanoparticles in Comparison with Ionic Liquid and rGO as Gate Dopant for Paper–Pencil-Based Flexible Field-Effect Transistors

Nanoparticle-based flexible field-effect transistors (FETs) containing carbon nanotubes (CNTs) and silicon nanowires (SiNWs) have attracted tremendous attention, since their interesting device performance can be utilized for integrated nanoscale electronics. However, use of CNTs and SiNWs on polymer substrates poses serious limitations in terms of their fabrication procedure, repeatability, and biodegradability. In this article, we report for the first time the fabrication and characteristics of solution-processed FETs on a paper substrate doped with easily prepared silver nanoparticles (AgNPs). To compare the FET performance, we fabricated two other FETs on paper containing ionic liquid (IL, 1-butyl-3-methylimidazolium octyl sulfate) and reduced graphene oxide (rGO) as dopants. We observe that the AgNP-based dopant generated good FET characteristics in terms of linear transconductance variations and higher carrier concentration values, showing negligible changes after bending and aging. In comparison with the AgNP-FET, the rGO- and IL-based dopants yielded high carrier mobilities, but the rGO-based FET is more susceptible to aging and bending. The excellent linearity of the IDS–VG curve found for the AgNP-FET ensures its applicability for devices requiring linear transfer characteristics such as linear amplifiers.

Barrier height inhomogeneities induced anomaly in thermal sensitivity of Ni/4H-SiC Schottky diode temperature sensor

This paper presents the thermal sensitivity variation trend of Ni/4H-nSiC (0001) Schottky diode based temperature sensor, equipped with floating metal guard ring and oxide field plate as edge terminations in low current regime, i.e., ranging from 1 nA to 5 pA. Various measurements were carried out at temperatures ranging from 233 K to 473 K in steps of 20 K. An imperative outcome of the present study, which is in contrast with the theory, is that there exists an anomaly in the device thermal sensitivity behaviour after a range of current. The thermal sensitivity of the fabricated device, calculated from the slope of forward voltage versus temperature plot, was found to be varied from 3.11 mV/K at 1 nA to 3.32 mV/K at 5 pA with standard error of ±0.03 mV/K. A detailed analysis of I-V-T characteristics by taking into account all the possibilities for variation in the barrier height and the ideality factor with temperature emphasizes that there exist barrier height inhomogeneities at the metal–semiconductor ...

Growth of residual stress-free ZnO films on SiO2/Si substrate at room temperature for MEMS devices

ZnO thick Stress relaxed films were deposited by reactive magnetron sputtering on 2”-wafer of SiO2/Si at room temperature. The residual stress of ZnO films was measured by measuring the curvature of wafer using laser scanning method and found in the range of 0.18 x 109 to 11.28 x 109 dyne/cm2 with compressive in nature. Sputter pressure changes the deposition rates, which strongly affects the residual stress and surface morphologies of ZnO films. The crystalline wurtzite structure of ZnO films were confirmed by X-ray diffraction and a shift in (0002) diffraction peak of ZnO towards lower 2θ angle was observed with increasing the compressive stress in the films. The band gap of ZnO films shows a red shift from ∼3.275 eV to ∼3.23 eV as compressive stress is increased, unlike the stress for III-nitride materials. A relationship between stress and band gap of ZnO was derived and proposed. The stress-free growth of piezoelectric films is very important for functional devices applications.

Effect of post oxidation annealing on electrical characteristics of Ni/SiO2/4H-SiC capacitor with varying oxide thickness

This paper describes an experimental observation of post oxidation annealing (POA) treatment on current-voltage and capacitance-voltage characteristics of Ni/SiO2/4H-SiC system with varying oxide thickness. The leakage current of fabricated structures shows an asymmetric behavior having noticeable effect of POA with the polarity of gate bias (+V or −V at the anode). When compared with the conventional wet oxidation, the POA processes greatly reduce interface-state density and enhance reliability of devices. An extensive increment in the barrier height at SiO2/4H-SiC interface was observed due to POA, which resulted into lower forward leakage current. A significant improvement in the oxide charges are also demonstrated using C-V characteristics of POA treated structures.

A process to control diaphragm thickness with a provision for back to front alignment in the fabrication of polysilicon piezoresistive pressure sensor

A MEMS process is described to control diaphragm thickness with an integrated provision for back to front alignment in the fabrication of a polysilicon piezoresistive pressure sensor. The end point detection for the diaphragm etching is suitably incorporated in the process so that it is also used for the back‐to‐front alignment. The proposed process is cost‐effective and suitable for the batch fabrication of the pressure sensor.

DLTS and in situ C–V analysis of trap parameters in swift 50 MeV Li3+ ion-irradiated Ni/SiO2/Si MOS capacitors

Ni/SiO2/Si MOS structures were fabricated on n-type Si wafers and were irradiated with 50 MeV Li3+ ions with fluences ranging from 1×1010 to 1×1012 ions/cm2. High frequency C–V characteristics are studied in situ to estimate the build-up of fixed and oxide charges. The nature of the charge build-up with ion fluence is analyzed. Defect levels in bulk Si and its properties such as activation energy, capture cross-section, trap concentration and carrier lifetimes are studied using deep-level transient spectroscopy. Electron traps with energies ranging from 0.069 to 0.523 eV are observed in Li ion-irradiated devices. The dependence of series resistance, substrate doping and accumulation capacitance on Li ion fluence are clearly explained. The study of dielectric properties (tan δ and quality factor) confirms the degradation of the oxide layer to a greater extent due to ion irradiation.

Experimental analysis of I‐V and C‐V characteristics of Ni/SiO2/4H‐SiC system with varying oxide thickness

Purpose – The purpose of this paper is to electrically examine the quality of thin thermally grown SiO2 with thickness variation, on Si‐face of 4H‐SiC (having 50 μm epitaxial layer) by current‐voltage (I‐V) and capacitance‐voltage (C‐V) methods.Design/methodology/approach – Metal‐oxide‐silicon carbide (MOSiC) structures with varying oxide thickness have been fabricated on device grade 4H‐SiC substrate. Ni has been used for gate metal on thermally oxidized Si‐face and a composite layer of Ti‐Au has been used for Ohmic contact on the highly doped C‐face of the substrate. Each structure was diced and bonded on a TO‐8 header with a suitable wire bonding for further testing using in‐house developed LabVIEW‐based computer aided measurement setup.Findings – The leakage current of fabricated structures shows an asymmetric behavior with the polarity of gate bias ( + V or −V at the anode). A strong relation of oxide thickness and temperature on effective barrier height at SiO2/4H‐SiC interface as well as on ...

A wet‐etch method with improved yield for realizing polysilicon resistors in batch fabrication of MEMS pressure sensor

Purpose – The purpose of this paper is to present a selective wet‐etching method of boron doped low‐pressure chemical vapour deposition (LPCVD) polysilicon film for the realization of piezoresistors over the bulk micromachined diaphragm of (100) silicon with improved yield and uniformity.Design/methodology/approach – The method introduces discretization of the LPCVD polysilicon film using prior etching for the grid thus dividing each chip on the entire wafer. The selective etching of polysilicon for realizing of piezoresistors is limited to each chip area with individual boundaries.Findings – The method provides a uniform etching on the entire silicon wafer irrespective of its size and leads to economize the fabrication process in a batch production environment with improved yield.Research limitations/implications – The method introduces one extra process step of photolithography and subsequent etching for discretizing the polysilicon film.Practical implications – The method is useful to enhance yield whi...

Accuracy analysis of oscillator-based active bridge circuit for linearly converting resistance to frequency

Based on active bridge followed by a relaxation oscillator, a resistance to frequency convertor circuit proposed by the authors is critically analyzed in non-ideal conditions. Due to the behavior of real components there is a deviation from idealities. The main sources of error can be considered and analyzed by carrying out first order analysis. Each source of error is treated as separate from the other one which helps to neglect any possible correlation. For minimization of main error a compensating method is illustrated, and results on its experimental validation are reported.