Jamshid Shokrollahi

Efficient Helper Data Key Extractor on FPGAs

Physical Unclonable Functions (PUFs) have properties that make them very attractive for a variety of security-related applications. Due to their inherent dependency on the physical properties of the device that contains them, they can be used to uniquely bind an application to a particular device for the purpose of IP protection. This is crucial for the protection of FPGA applications against illegal copying and distribution. In order to exploit the physical nature of PUFs for reliable cryptography a so-called helper data algorithm or fuzzy extractor is used to generate cryptographic keys with appropriate entropy from noisy and non-uniform random PUF responses. In this paper we present for the first time efficient implementations of fuzzy extractors on FPGAs where the efficiency is measured in terms of required hardware resources. This fills the gap of the missing building block for a full FPGA IP protection solution. Moreover, in this context we propose new architectures for the decoders of Reed-Muller and Golay codes, and show that our solutions are very attractive from both the area and error correction capability points of view.

Protection and retrieval of encrypted multimedia content: when cryptography meets signal processing

The processing and encryption of multimedia content are generally considered sequential and independent operations. In certain multimedia content processing scenarios, it is, however, desirable to carry out processing directly on encrypted signals. The field of secure signal processing poses significant challenges for both signal processing and cryptography research; only few ready-togo fully integrated solutions are available. This study first concisely summarizes cryptographic primitives used in existing solutions to processing of encrypted signals, and discusses implications of the security requirements on these solutions. The study then continues to describe two domains in which secure signal processing has been taken up as a challenge, namely, analysis and retrieval of multimedia content, as well as multimedia content protection. In each domain, state-of-the-art algorithms are described. Finally, the study discusses the challenges and open issues in the field of secure signal processing.

Efficient FPGA-based karatsuba multipliers for polynomials over F 2

We study different possibilities of implementing the Karatsuba multiplier for polynomials over F 2 on FPGAs. This is a core task for implementing finite fields of characteristic 2. Algorithmic and platform dependent optimizations yield efficient hardware designs. The resulting structure is hybrid in two different aspects. On the one hand, a combination of the classical and the Karatsuba methods decreases the number of bit operations. On the other hand, a mixture of sequential and combinational circuit design techniques includes pipelining and can be adapted flexibly to time-area constraints. The approach-both theory and implementation _ can be viewed as a further step towards taming the machinery of fast algorithmics for hardware applications.

Efficient Multiplication Using Type 2 Optimal Normal Bases

In this paper we propose a new structure for multiplication using optimal normal bases of type 2. The multiplier uses an efficient linear transformation to convert the normal basis representations of elements of

Tradeoff analysis of FPGA based elliptic curve cryptography

\mathbb{F}_{q^{n}}

Explicit Formulas for Efficient Multiplication in \mathbb{F}_{3^{6m}}

to suitable polynomials of degree at most nover

Fast arithmetic for polynomials over F 2 in hardware

\mathbb{F}_{q}

FPGA designs of parallel high performance GF(2/sup 233/) multipliers [cryptographic applications]

. These polynomials are multiplied using any method which is suitable for the implementation platform, then the product is converted back to the normal basis using the inverse of the above transformation. The efficiency of the transformation arises from a special factorization of its matrix into sparse matrices. This factorization -- which resembles the FFT factorization of the DFT matrix -- allows to compute the transformation and its inverse using O(nlogn) operations in

Resource Efficiency of Instruction Set Extensions for Elliptic Curve Cryptography

\mathbb{F}_{q}

Efficient FPGA-Based Multipliers for F 397 and F 36.97

, rather than O(n2) operations needed for a general change of basis. Using this technique we can reduce the asymptotic cost of multiplication in optimal normal bases of type 2 from reported by Gao et al. (2000) to M (n) + O(nlogn) operations in