Jan B. Wilstrup

A new method for jitter decomposition through its distribution tail fitting

We present a new time-domain jitter separation method. Such a method automatically searches and fits the tail parts of the jitter histogram with nonlinear jitter models and estimates deterministic and random jitter components. Bit error rate (BER) calculation based on the deterministic and random jitter components is also discussed and demonstrated.

A method of serial data jitter analysis using one-shot time interval measurements

A method for measuring inter-symbol interference, duty cycle distortion, random jitter and periodic jitter is described. The Blackman-Tukey method of signal analysis is used. This allows the application of jitter tolerance masks to ensure compliance to data communication standards. Mathematical analysis and computer simulations have been performed. The autocorrelation function and an FFT for clock jitter analysis have been implemented on our current product. A provisional patent application has been filed.

Transfer functions for the reference clock jitter in a serial link: theory and applications

Transfer functions for the reference clock jitter in a serial link such as the PCI express 100 MHz reference clock are established for various clock and data recovery circuits (CDRCs). In addition, mathematical interrelationships between phase, period, and cycle-to-cycle jitter are established and phase jitter is used with the jitter transfer function. Numerical simulations are carried out for these transfer functions. Relevant eye-closure/total jitter at a certain bit error rate (BER) level for the receiver is estimated by applying these jitter transfer functions to the measured phase jitter of the reference clock over a range of transfer function parameters. Implications of this new development to serial link reference clock testing and specification formulation are discussed.

A general purpose ATE based I/sub DDQ/ measurement circuit

Previously published measurement circuits offered good solutions for measuring I/sub DDQ/ on a fairly narrow range of part types. Most of these solutions have required adding circuitry either to the DUT board or to the DUT itself. In this paper we describe a general purpose, ATE Pin Electronics Card based, I/sub DDQ/ measurement circuit. It gives good results over a very wide range of device types, supply currents, switching currents, bypass capacitance and I/sub DDQ/ currents.