Jane G. Zhu

Solid phase epitaxy of stressed and stress‐relaxed Ge‐Si alloys

Solid phase epitaxy of 3500‐A‐thick GexSi1−x (0.04≤x≤0.12) films on (100) Si substrates has been investigated. The thickness of regrown layers increased linearly with annealing time in the temperature range of 475–575 °C. The regrowth rates of stressed alloys were less than those of pure Si, while stress‐relaxed alloys have larger rates than Si. The difference in regrowth rates was explained by the activation‐strain tensor model (Aziz, Sabin, and Lu, to be published in Phys. Rev. B). The first element of the activation‐strain tensor obtained in this experiment was in excellent agreement with that deduced by Aziz et al. For low Ge concentrations (x<0.08), the recrystallized region was of good crystalline quality. However, threading dislocations were observed in a stressed Ge0.1Si0.9 alloy after complete recrystallization. During the regrowth at 550 °C, the Ge‐Si alloy first regrew coherently up to 300 A, above which threading dislocations started to nucleate. On the other hand, no dislocations were detecte...

60° dislocations in (001) GaAs/Si interfaces

Abstract The geometry of 60° dislocations at the (001) GaAs/Si. heterojunction is discussed considering transmission electron microscopy images of plan-view samples. The GaAs examined was grown by molecular beam epitaxy on to a Si substrate, which had been polished to be 4° off the exact (001) plane, towards the [110] direction. Both 60° and pure edge dislocations may be present at the interface to accommodate the lattice misfit. The Burgers vectors of all the dislocations involved are (a/2)(110). The 60° dislocations interact with the network of orthogonal edge dislocations which is present at the interface and cause displacements of the edge dislocations. Because of the tilt of the heterojunction away from the exact 〈001〉 plane, the density of these 60° dislocations along [110] direction is different from that along ]110] direction. The changes in geometry when like 60° dislocations are dissociated is described.

Microstructure of epitactically grown GaAs/ErAs/GaAs

A series of GaAs/ErAs/GaAs epilayer heterostructures has been grown on (100)GaAs substrates by molecular beam epitaxy and characterized by high‐resolution transmission electron microscopy and Rutherford backscattering measurements. Good epitaxy of the ErAs on the GaAs is demonstrated. The top GaAs layer is usually epitactically aligned with ErAs/GaAs in most areas; however, growth of (111)GaAs on (100)ErAs has also been observed. Small grains are present in the top GaAs layer which are twinned on {111} with respect to epitactic grains. These give rise to GaAs {122}/ErAs(100) phase boundaries. The {122} oriented GaAs grains do not continue throughout the GaAs growth but are overgrown by the neighboring epitactic grains.

Solid phase epitaxy of a Ge-Si alloy on [111] Si through a Pd2Si layer

Solid phase epitaxy of a Ge70Si30 alloy on [111]Si substrates was achieved in the amorphous Ge/Pd2Si/[111]Si system. Upon annealing at temperatures above 600 °C,the Ge transported through the silicide layer and formed a Ge‐rich, Si‐Ge epitaxial layer on top of the Si substrate. At the same time the Pd silicide layer exchanged positions with the Ge, leading to the final configuration of Pd2Si/Si‐Ge/[111]Si. The crystallinity of Pd2Si had a major effect on the epitaxy of the Ge‐Si alloy. On [100]Si where the Pd2Si was polycrystalline, epitaxial Ge‐Si growth was not observed.

Thermal stability of PtSi contact to GexSi1−x

Thermal stability of PtSi contact to epitaxial Ge0.5Si0.5/(100)Si has been investigated. The PtSi layer remained structurally and morphologically intact on the epitaxial Ge‐Si alloy at temperatures around 650 °C. When annealed at higher temperatures, PtSi penetrated locally into the alloy, although no chemical reaction was observed. The observed stability of PtSi is explained on the basis of a ternary Pt‐Ge‐Si equilibrium phase diagram. Other choices of contact compounds on Ge‐Si alloys are also discussed.

Buried Metal/III-V Semiconductor Heteroepitaxy: Approaches to Lattice Matching

Metallic transition metal aluminides and gallides with the CsCI structure and semi-metallic rare earth monopnictides with the NaCi structure have been grown as buried conducting layers in III-V compound semiconductor heterostructures. The criteria for achieving (100) oriented epitaxial growth on (100)111-V semiconductor surfaces is different for each class of materials. The methods used to achieve III-V/metal/llI-V heteroepitaxial structures are discussed here with emphasis on the different approaches needed for the aluminides or gallides and the monopnictides. Work producing exact lattice matching between the buried metal and surrounding semiconductor layers makes possible the separation of lattice mismatch effects from those due to other interface parameters. Results to date indicate that defect structures in the overgrown semiconductor layers arise more because of differences in crystal symmetry, interface chemistry and bonding across the interface than lattice mismatch.

Ge Transport and Epitaxy on [111] Si in the Ge/Pd 2 Si/Si System

Solid phase epitaxy in the amorphous(a)-Ge/Pd 2 Si/Si system has been investigated in the temperature range of 600 to 750 °C. The top Ge started to migrate into the suicide layer at 600 °C. After longer time annealing the mixed Ge released from the suicide matrix and formed a laterally uniform epitaxial Ge 70 Si 30 layer on the [111] Si substrate. A minimum yield of 0.1 was achieved for a 800 A-thick Ge 70 Ge 30 layer.

Misfit Dislocations at Mismatched Epitactic Heterojunctions

The formation and structures of misfit dislocations are significant factors in understanding heteroepitaxy of lattice-mismatched materials. In this study, GaAs/Si, CoGa/GaAs and ErAs/GaAs heterojunctions in materials grown by molecular-beam epitaxy have been characterized using transmission electron microscopy. Different types of misfit dislocations have been generated at these interfaces. The different dislocation configurations are discussed, along with interactions between 60° and 90° dislocations in GaAs/Si heterojunctions; the 60° dislocations might be associated with surface steps or edges of islands. The growth of antiphase boundary structures in the CoGa and ErAs grown on GaAs are proposed.

Characterization of ErAs/GaAs and GaAs/ErAs/GaAs Structures

A series of ErAs/GaAs and GaAs/ErAs/GaAs epilayers have been grown on (100) GaAs substrates by molecular-beam epitaxy. Misfit dislocations at the ErAs/GaAs interface have been analyzed using the weak-beam technique of transmission electron microscopy. The microstructure of GaAs/ErAs/GaAs layers have been characterized using conventional and high-resolution electron microscopy. Twinning inside the upper GaAs layer is the major defect. Although the desired epitactic (100) GaAs on (100) ErAs does dominate, small grains of GaAs with (111) or {122} orientations have been observed at the GaAs/ErAs heterojunction.

Defects and Interfaces in GaAs Grown on Si

The characterization of semiconductor epilayers by electron microscopy has revealed many different defects in the epilayer. Observations on three representative examples from GaAs epilayers grown on Si are presented. Double-ribbons, which are formed as a result of dislocation interactions near the heterojunction, have been used to determine the intrinsic and extrinsic stacking-fault energies in GaAs. Inverted stacking-fault pyramids have been observed which have nucleated in the epilayer and grown outward to the surface. Finally, differences in the growth rates of different twins are recorded by using AlGaAs layers to preserve the growth surface at various stages during epilayer growth.