Jang-Han Kim

Carrier loss and luminescence degradation in green-light-emitting InGaN quantum wells with micron-scale indium clusters

Influence of the size of indium clusters on optical properties of green-light-emitting InGaN quantum wells (QWs) was investigated by photoluminescence (PL), cathodoluminescence, PL excitation, and time-resolved PL techniques. Low luminescence efficiency was observed for green-light-emitting InGaN QWs with micron-sized indium clusters, in contrast to the case of InGaN QWs with submicron-sized small indium segregation. Both the thermal activation energy and the carrier lifetime dramatically decreased, while a large Stokes-like shift between absorption edge and PL peak energy was still observed for the InGaN QWs with micron-sized indium clusters. These facts indicate that the effective potential barrier between radiative and nonradiative channels (thus effective carrier localization) rapidly decreases due to the formation of micron-sized large indium clusters possessing a number of nonradiative centers, leading to significant luminescence degradation.

SOI single-electron transistor with low RC delay for logic cells and SET/FET hybrid ICs

We report on a successful fabrication of silicon-based single-electron transistors (SETs) with low RC time constant and their applications to complementary logic cells and SET/field-effect transistor (FET) hybrid integrated circuit. The SETs were fabricated on a silicon-on-insulator (SOI) structure by a pattern-dependent oxidation (PADOX) technique, combined with e-beam lithography. Drain conductances measured at 4.2 K approach large values of the order of microsiemens, exhibiting Coulomb oscillations with peak-to-valley current ratios /spl Gt/1000. Data analysis with a probable mechanism of PADOX yields their intrinsic speeds of /spl sim/ 2 THz, which is within an order of magnitude of the theoretical quantum limit. Incorporating these SETs as basic elements, in-plane side gate-controlled complementary logic cells and SET/FET hybrid integrated circuits were fabricated on an SOI chip. Such an in-plane structure is very efficient in the Si fabrication process, and the side gates adjacent to the electron island could easily control the phase of Coulomb oscillations. The input-output voltage transfer, characteristic of the logic cell, shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2 K. The SET/FET hybrid integrated circuit consisting of one SET and three FETs yields a high-voltage gain and power amplification with a wide-range output window for driving the next circuit. The small SET input gate voltage of 30 mV is finally converted to 400 mV, corresponding to an amplification ratio of 13.

Long-term electron leakage mechanisms through ONO interpoly dielectric in stacked-gate EEPROM cells

Analyzing the measured shift rate of cell threshold-voltage, we have studied the long-term electron leakage mechanisms through an oxide-nitride-oxide (ONO) interpoly dielectric, which causes reliability problems due to the degradation of the data retention characteristics in the stacked-gate Flash EEPROM devices. The cell threshold-voltage shifts were measured as a function of bake time at various temperatures by the high-temperature accelerated test. Based on the experimental results, a new empirical model was developed and evaluated. It can explain the dominant mechanisms for the spontaneous charge leakage through an ONO interpoly dielectric for the long-term phase. The model clearly shows that cell threshold-voltage shifts during the baking test are caused predominantly by the thermally activated direct-tunneling when electrons, after escaping from the internitride trap-sites near the top oxide of ONO layer by the thermionic emission mechanism, finally tunnel through the thin top oxide to the control gate. This interpretation is strongly supported by the V/sub T/-shift and temperature dependence of the V/sub T/-shift rate, showing that the simulation results are well fit to the experimental data.

Non-volatile switching characteristics in wet-deposited Ag2Se/GeSe double layers for resistive random access memory applications

The resistance switching characteristics of resistive random access memory (ReRAM) based on amorphous GeSe thin films have been demonstrated by using Al/Ag2Se/GeSe/Pt structure. The Ag2Se layer that serves as the metal ionic source of GeSe switching medium was formed by a very simple wet-deposition process in AgNO3 solution. The X-ray diffraction and Auger electron spectroscopy analysis revealed the existence of the Ag2Se layer. As a result, an extremely low-voltage set/reset operation of less than 0.2 V, a high on-off resistance ratio larger than 103, good endurance characteristics, and excellent long-term reliability were achieved by the proposed Ag2Se/GeSe bilayered ReRAMs using the wet-deposition process.

Rectifying characteristics and bipolar resistance switching behaviors in sol–gel processed TiOx thin film

We demonstrate a sol–gel processed Ti/TiOx/Pt device for rectifying characteristics as well as resistive switching. In the rectification mode, Ti/TiOx/Pt device exhibited a forward current density (>102 A/cm2) and on/off ratio (>104) owing to asymmetric Schottky barrier at the Ti/TiOx (0.11 eV) and TiOx/Pt (0.57 eV). After the forming process by applying the positive bias, the rectification mode of sol–gel TiOx device changed to the resistive switching mode. In the case of resistive switching mode, when applying the negative bias, the high resistance state (HRS) is dominated by Schottky emission in low voltage and by Poole–Frenkel emission in high voltage. Contrary to applying the negative bias, the HRS exhibited the Schottky emission in the whole positive bias. Different type of switching mechanisms might be attributed to the oxygen vacancy distribution across the TiOx active layer.

Improved Uniformity of Resistive Switching Characteristics in Ge 0.5 Se 0.5 -based ReRAM Device Using the Ag Nanocrystal

The resistive switching characteristics of resistive random access memory (ReRAM) based on amorphous Ge0.5Se0.5 thin films have been demonstrated by using Ti/Ag nanocrystals/Ge0.5Se0.5/Pt structure. Ag nanocrystals (Ag NCs) were spread on the amorphous Ge0.5Se0.5 thin film and they played the role of metal ions source. As a result, comparing the conventional Ag/Ge0.5Se0.5/Pt structure, this Ti/Ag NCs/Ge0.5Se0.5/Pt ReRAM device exhibits the highly uniform bipolar resistive switching (BRS) characteristics, such as the operating voltages, and the resistance values. At the same time, a stable DC endurance(> 100 cycles), and the excellent data retention (> 10 sec) properties were found from the Ti/Ag NCs/Ge0.5Se0.5/Pt structured ReRAM device.