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Dive into the research topics where Jason J. Moore is active.

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Featured researches published by Jason J. Moore.


IEEE Transactions on Nuclear Science | 2004

Dynamic testing of Xilinx Virtex-II field programmable gate array (FPGA) input/output blocks (IOBs)

Gary M. Swift; Sana Rezgui; J. George; Carl Carmichael; Matthew Napier; John Maksymowicz; Jason J. Moore; Austin H. Lesea; R. Koga; T. F. Wrobel

Heavy-ion irradiation and fault injection experiments were conducted to evaluate the upset sensitivity of the Xilinx Virtex-II field programmable gate arrays (FPGAs) input/output block (IOB). Full triple module redundancy (TMR) of the IOBs, in combination with regular configuration scrubbing, proved to be a quite effective upset mitigation method.


Proceedings of the IEEE | 2014

FPGA Security: Motivations, Features, and Applications

Stephen M. Trimberger; Jason J. Moore

Since their inception, field-programmable gate arrays (FPGAs) have grown in capacity and complexity so that now FPGAs include millions of gates of logic, megabytes of memory, high-speed transceivers, analog interfaces, and whole multicore processors. Applications running in the FPGA include communications infrastructure, digital cinema, sensitive database access, critical industrial control, and high-performance signal processing. As the value of the applications and the data they handle have grown, so has the need to protect those applications and data. Motivated by specific threats, this paper describes FPGA security primitives from multiple FPGA vendors and gives examples of those primitives in use in applications.


field programmable gate arrays | 2011

Authenticated encryption for FPGA bitstreams

Stephen M. Trimberger; Jason J. Moore; Weiguang Lu

FPGA bitstream encryption blocks theft of the design in the FPGA bitstream by preventing unauthorized copy and reverse engineering. By itself, encryption does not protect against tampering with the bitstream, so without additional capabilities, bitstream encryption cannot prevent the FPGA from executing an unauthorized bitstream. An unauthorized bitstream might be generated by trial and error to cause the FPGA to leak confidential data, including the decrypted bitstream. Strong authentication detects tampering with the bitstream, providing a root of trust that enables applications that require protection of sensitive data in a hostile environment. This paper describes the SHA HMAC-based bitstream authentication algorithm and protocol in Virtex-6 FPGAs and shows how they are integrated in the bitstream.


design automation conference | 2014

FPGA Security: From Features to Capabilities to Trusted Systems

Steve Trimberger; Jason J. Moore

FPGA devices provide a range of security features which can provide powerful security capabilities. This paper describes many security features included in present-day FPGAs including bitstream authenticated encryption, configuration scrubbing, voltage and temperature sensors and JTAG-intercept. The paper explains the role of these features in providing security capabilities such as privacy, anti-tamper and protection of data handled by the FPGA. The paper concludes with an example of a single-chip cryptographic system, a trusted system built with these components.


Archive | 2006

Circuit for and method of implementing a plurality of circuits on a programmable logic device

Saar Drimer; Jason J. Moore; Austin H. Lesea


Archive | 2013

Secured booting of a field programmable system-on-chip including authentication of a first stage boot loader to mitigate against differential power analysis

Edward S. Peterson; Roger D. Flateau; James D. Wesselkamper; Steven E. McNeil; Jason J. Moore; Lester S. Sanders; Lawrence C. Hung; Yatharth K. Kochar


Archive | 2013

Image file generation and loading

Lester S. Sanders; Yatharth K. Kochar; Steven E. McNeil; Jason J. Moore; Roger D. Flateau; Lawrence C. Hung


Archive | 2008

Isolation verification within integrated circuits

Jason J. Moore; Ian L. McEwen; Reto Stamm; John D. Corbett; Eric M. Shiflet


Archive | 2011

Verification of logic core implementation

Brendan K. Bridgford; Jason J. Moore; W. Story Leavesley; Derrick S. Woods


Archive | 2010

Method and integrated circuit for protecting against differential power analysis attacks

Brendan K. Bridgford; Jason J. Moore; Stephen M. Trimberger; Eric E. Edwards

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