Jean-François Santucci

Discrete Event Modeling and Simulation of Wireless Sensor Network Performance

The wireless distributed microsensor networks have profited from recent technological advances and it seems essential to precisely understand these systems. Modeling and simulation appear to be an essential aspect of predicting the Wireless Sensor Network (WSN) specific behavior under different conditions. We want to provide a new method of modeling, simulation and visualization of WSN using a discrete-event approach. Described by Zeigler in the 1970s, the Discrete Event System Specification is ideal for describing the asynchronous nature of the events occuring in WSN. We have provided a basic model for the analysis of WSN performance, including routing management, energy consumption and relative CPU activity. Our approach uses a detailed definition of node-oriented components and aims to introduce methods of visualizing the network at a different level of abstraction.

BEHAVIORAL FAULT SIMULATION

Due to the ever-increasing complexity of VLSI circuits, the use of VHDL [Vhd87] behavioral descriptions in the fields of test generation and fault simulation becomes advised. In order to understand this evolution and the context in which it is efficient, the increasing complexity of VLSI circuits must be considered. To better cope with the complexity of existing and future systems, higher abstraction levels must be taken into account. Furthermore, the only knowledge about the device being tested may come from data sheets or signal measurements. In this case the only way to generate test patterns is behavioral testing. Today, such a task is done manually and one of the main interests in Behavioral Test Pattern Generation (BTPG) is to automate it. Another point to consider is that the test generation process is an integral part of the design process and its implementation must begin during the behavioral design phase.

Fuzz-iDEVS: towards a fuzzy toolbox for discrete event systems

In this paper, we present a set of tools for the simulation of fuzzy systems. The described methods allow to take into account and to handle a lot of imperfect parameters for the studied systems. The methods developed are based on fuzzy logic and DEVS formalism. Their goal is to expand fields of application of simulation environments, and to foster interdisciplinary collaborations. At first, we have applied them to study the spread of forest fires. This application was developed in collaboration with the fire-fighters.

Speed up of Behavioral A.T.P.G. Using a Heuristic Criterion

This paper presents an approach aiming at a significant acceleration of a Behavioral Test Pattern Generation process. Recently, new BTPG methods have been developed, based upon the application of a backtracking search procedure. The approach presented herein reduces the number of backtracks by firstly comparing search strategies and then by defining an improvement criteria.

Automatic behavioral test pattern generation for digital circuits

As complexity of circuits has increased and design techniques have evolved, testing them has evolved as well. This evolution has led to take into account high-level behavioral descriptions of circuits for generating their test patterns. The authors explain the reasons which have motivated research laboratory to become interested in behavioral generation. Having surveyed the representative work of the domain, the authors present their approach for generating test patterns from high-level behavioral descriptions.<<ETX>>

iDEVS: New method to study inaccurate systems

Our recent research in the fields of modeling and simulation of complex systems, led us to study fuzzy systems. A system is fuzzy, because its parameters are inaccurate, or its behavior is uncertain. We propose in this paper to describe a new modeling method based on the association of DEVS formalism and the fuzzy sets theory. The combination of these two approaches we have permit to define a new method of inaccurate modeling. Our goal is to study systems with inaccurate parameters.

A methodology to reduce the computational cost of behavioral test pattern generation

The authors present different methods of computing testability measures for behavioral descriptions of digital circuits. The computation of testability measures based on the work described has been implemented and integrated into a behavioral deterministic test pattern generator to study the effectiveness of the proposed testability measures. The internal model derived from behavioral descriptions is presented. The main features of a behavioral test pattern generation algorithm that was implemented are described. The definition of controllability and observability of the basic elements of the internal model is given. Experiments performed on test generation are described, and the results are summarized.<<ETX>>

Pseudo-random behavioral ATPG

This paper deals with a new approach for the Automatic Test Pattern Generation (ATPG) of circuits described from a behavioral point of view in VHDL. This approach is based on a pseudo-random process characterized by the fact that criteria for computing the test length and evaluating the quality of the generated data come from the field of software engineering. This paper presents the bases of this new approach in the field of hardware engineering and some experimental results.

On the modeling and testing of VHDL behavioral descriptions of sequential circuits

A new automatic test generation principle based on a formal modeling of VHDL behavioral descriptions is proposed. Using to the finite state machine representation and a formalism close to that of Petri nets, the authors define two models which represent all the concepts associated with a VHDL description. They then propose a generation principle which uses both forward and backward time processing.<<ETX>>

Methods to measure and to enhance the testability of behavioral descriptions of digital circuits

The authors present an approach to reduce the cost of test pattern generation of behavioral descriptions. This approach utilizes a group of methods allowing the designer to assess and to enhance the testability of behavioral descriptions.<<ETX>>