Jen-Chieh Tsai

Modified Hysteretic Current Control (MHCC) for Improving Transient Response of Boost Converter

This paper proposes a modulated hysteretic current control (MHCC) technique to improve the transient response of a DC-DC boost converter, which suffers from low bandwidth due to the existence of the right-half-plane (RHP) zero. The MHCC technique can automatically adjust the on-time value to rapidly increase the inductor current, as well as to shorten the transient response time. In addition, based on the characteristic of the RHP zero, the compensation poles and zero are deliberately adjusted to achieve fast transient response in case of load transient condition and adequate phase margin in steady state. Experimental results show the improvement of transient recovery time over 7.2 times in the load transient response compared with the conventional boost converter design when the load current changes from light to heavy or vice versa. The power consumption overhead is merely 1%.

Dual Modulation Technique for High Efficiency in High-Switching Buck Converters Over a Wide Load Range

A dual modulation technique to improve power conversion efficiency with minimal increase in output voltage ripple is presented. The worsening switching noise caused by parasitic resistance and inductance due to high-switching operation can also be alleviated by the proposed ac ripple detector. Furthermore, the dual modulation method can speed up the load transient response since the switching frequency can increase to 5 MHz during the transient period. At very light loads, the switching frequency is always kept higher than the acoustic frequency to avoid noisy sound. Experiment results show that the converter operates at 5 MHz using a small inductor of 1 μH. The load transient response time is shorter than 3 μs when load current changes from 150 to 450 mA or vice versa. Power efficiency is kept higher than 85% over a wide load current range. Specifically, light efficiency can be raised to about 45% above that of the conventional design.

Boundary Conduction Mode Controlled Power Factor Corrector With Line Voltage Recovery and Total Harmonic Distortion Improvement Techniques

The proposed line voltage recovery (LVR) and the total harmonic distortion improvement (THDI) technique improve power factor (PF) and total harmonic distortion (THD) over a wide line voltage range in boundary conduction mode controlled power factor corrector (PFC). The LVR detects the input line root-mean-square voltage to generate the digital equivalent code to the THDI for optimizing the THD by tuning the on-time value at different line voltages. In addition, the LVR and the THDI provide a feedforward path to reduce the ripple of the feedback voltage for further improving the THD. Therefore, the PFC controller can keep high PF and low THD over a wide line voltage. Experimental results demonstrate that the peak PF value is 0.998 and the minimum THD is 1.7% by the test circuit fabricated in a TSMC 800-V ultrahigh-voltage process with the universal line voltage range of 90-264 V.

Perturbation On-Time (POT) Technique in Power Factor Correction (PFC) Controller for Low Total Harmonic Distortion and High Power Factor

The proposed perturbation on-time technique suppresses total harmonic distortion (THD) and, thus, improves the power factor in the power factor correction (PFC) controller. Besides, the adaptive control of the minimum off time by the proposed inhibit time control can improve efficiency even at low ac input voltage. Therefore, highly integrated PFC converter fabricated in the TSMC 800-V ultrahigh voltage process can achieve low THD of 6%, high PF of 99%, and high efficiency of 95% at the output power of 90 W.

Perturbation on-time (POT) control and inhibit time control (ITC) in suppression of THD of power factor correction (PFC) design

The paper presented the perturbation on-time (POT) control technique to suppress the total harmonic distortion (THD) to improve the performance of the power factor correction (PFC) in the AC-DC converter. Simultaneously, it can improve the efficiency through the proposed inhibit time control (ITC) mechanism at low AC input voltage. The test circuit fabricated in TSMC 800V UHV process can show the highly-integrated PFC controller. Experimental results demonstrate low THD of 8%, which results in high PF of 99%. Besides, high efficiency of 95% can be ensured at the output power of 90W.

Dual modulation technique for high efficiency in high switching buck converters over a wide load range

A dual modulation technique to improve power conversion efficiency with minimal increase in output voltage ripple is presented. The worsening switching noise caused by parasitic resistance and inductance due to high-switching operation can also be alleviated by the proposed ac ripple detector. Furthermore, the dual modulation method can speed up the load transient response since the switching frequency can increase to 5 MHz during the transient period. At very light loads, the switching frequency is always kept higher than the acoustic frequency to avoid noisy sound. Experiment results show that the converter operates at 5 MHz using a small inductor of 1 μH. The load transient response time is shorter than 3 μs when load current changes from 150 to 450 mA or vice versa. Power efficiency is kept higher than 85% over a wide load current range. Specifically, light efficiency can be raised to about 45% above that of the conventional design.

High-PF and ultra-low-THD power factor correction controller by sinusoidal-wave synthesis and optimized THD control

The proposed sinusoidal-wave synthesis (SWS) and the optimized THD control (OTC) improve power factor (PF) and total harmonic distortion (THD) over a wide line voltage range. The SWS detects the input line root-mean-square (rms) voltage to generate the digital equivalent code to the OTC for optimizing the THD by tuning the on-time value. Besides, the SWS and the OTC provide a feedforward path to reduce the ripple of the feedback voltage for further improving the THD. Therefore, the PFC converter can keep high PF and low THD over a wide line voltage. Experimental results demonstrate the PF is higher than 0.99 and the THD is 1.7% at VAC of 90-110V by the test circuit fabricated in TSMC 800V UHV process.

Triple loop modulation (TLM) for high reliability and efficiency in Power Factor Correction (PFC) system

Reliability of the Power Factor Correction (PFC) system was improved by fast transient response using the proposed triple loop modulation (TLM). Low bandwidth of less than 20 Hz that rejects AC source of 60/120 Hz coupling deteriorated system reliability in case of output load variation. The proposed TLM can automatically adjust bandwidth to rapidly increase or decrease inductor current in order to shorten transient response time. In steady state, system stability can be guaranteed by low-frequency compensation pole without being affected by TLM. The test circuit fabricated in VIS 500 V UHV LDMOS process demonstrated the performance of the highly-integrated PFC controller with the proposed TLM. Experimental results showed that the PFC system with TLM has high PF of 99%, high efficiency of 95%, and high power driving capability of about 90 W. The improvement in transient response is twofold faster than conventional PFC design with output load variation from 90W to 45 W and vice versa.

Variable sampling slope (VSS) and no-deadtime ramp generator (NDRG) techniques for closed-loop interleaving power factor correction (PFC) design with suppression of current mismatch

The proposed interleaving power factor correction (PFC) can effectively reduce the size of the AC-DC converter for portable electronics. Fully integrated variable sampling slope (VSS) technique can provide precise phase regulation under variable line voltage. Besides, the no-deadtime ramp generator (NDRG) records the previous status to modify the sequent on-time value to achieve current sharing for suppressing the total harmonic distortion (THD) and restraining the input current ripple, EMI filter, and the size of input inductor. Therefore, more power can be provided by the proposed interleaving PFC than that of single-phase PFC. Simultaneously, the drawback of the peak current twice than the average current in the Boundary control mode (BCM) can be greatly reduced. The test circuit fabricated in the TSMC 0.5μm 800V UHV process shows the highly integrated interleaving PFC can deliver high power of 180W with improved phase regulation precision.