Jen-Chieh Wu

2.45-GHz CMOS Reflection-Type Phase-Shifter MMICs With Minimal Loss Variation Over Quadrants of Phase-Shift Range

CMOS reflection-type phase shifters with minimal insertion-loss variation over quadrants of phase-shift range are presented. Two performance enhancement techniques are proposed. First, the 3-dB quadrature hybrid is designed with a phase-compensated inductively coupled hybrid. Second, an impedance-transformed pi-resonated varactor network is presented to provide a full 360deg phase range, using a MOSFET varactor with limited reactance variation range. The design considerations and simulation are described. Two experimental 2.45-GHz phase shifters were implemented in 0.18-mum CMOS technology. One has a measured phase-shift range of 120deg with the insertion loss of 5.6 plusmn 1.2 dB in 2.33-2.60 GHz and the other has a phase range larger than 340deg with the insertion loss of 10.6 plusmn 2 dB in 2.44-2.55 GHz. Both chips are extremely compact with sizes of 0.72 and 0.66 mm2, respectively, and consume zero dc power.

Novel Design of a 2.5-GHz Fully Integrated CMOS Butler Matrix for Smart-Antenna Systems

This paper presents a novel design of monolithic 2.5-GHz 4times4 Butler matrix in 0.18-mum CMOS technology. To achieve a full integration of smart antenna system monolithically, the proposed Butler matrix is designed with the phase-compensated transformer-based quadrature couplers and reflection-type phase shifters. The measurements show an accurate phase distribution of 45plusmn3deg, 135 plusmn 4deg, -45 plusmn 3deg, and -135 plusmn 4deg with amplitude imbalance less than 1.5 dB. The antenna beamforming capability is also demonstrated by integrating the Butler matrix with a 1 X 4 monopole antenna array. The generated beams are pointing to -45deg, -15deg, 15deg, and 45deg, respectively, with less than 1deg error, which agree very well with the predictions. This Butler matrix consumes no dc power and only occupies the chip area of 1.36 times 1.47 mm2. To our knowledge, this is the first demonstration of the single-chip Butler matrix in CMOS technology.

A 24-GHz CMOS Butler Matrix MMIC for multi-beam smart antenna systems

A 24-GHz 4-way Butler matrix MMIC in 0.18-mum CMOS technology is presented. The multi-layer structure of CMOS process is utilized to monolithically realize the bulky Butler matrix on silicon substrate. Particularly, the multi-layer bifilar transformer is introduced to miniaturize the circuit and reduce the signal loss. The implemented CMOS Butler matrix MMIC only occupies a chip area of 0.41 mm2 (excluding I/O pads). The experimental results show that insertion losses are 2.2plusmn0.6 dB from 23 to 25 GHz and the phase errors are within 6deg. Therefore, by connecting this Butler matrix to a linear array antenna, four orthogonal beams, pointing to -49deg, -15deg, 15deg, and 49deg, respectively, are generated within 0.3deg error.

A 25-GHz Compact Low-Power Phased-Array Receiver With Continuous Beam Steering in CMOS Technology

A compact low-power phased array receiver with continuous beam steering is presented based on the subsector beam steering technique. The entire beam steering range is divided into five subsectors from four characteristic beams of the Butler matrix. In each subsector the receive beam is steered by weighted combination of the received signals from array antennas. The theory of beam steering is detailed and the relationship of the steered angle with the beam steering factors is derived. The proposed architecture has lower circuit complexity and less power consumption because no challenging CMOS 360° variable phase shifters and multi-phase voltage-controlled oscillators are required. The phased array MMIC implemented in 0.13 μm CMOS technology has 17-21 dB receiving gain and 8.9-10.7 dB noise figure in 25-26 GHz. It consumes lower than 30 mW and takes a small chip area of 1.43 mm2. The continuous beam steering is demonstrated over the spatial range from -90° to +90°.

A 24-GHz full-360° CMOS reflection-type phase shifter MMIC with low loss-variation

A 24-GHz bi-directional CMOS reflection-type phase shifter (RTPS) with full 360deg phase tuning range and minimal insertion-loss variation is presented. Two circuit enhancement techniques are employed: the broadside-coupled transformer-based hybrid and the pi-type resonated varactor load. The implemented 0.18-mum CMOS RTPS demonstrates a measured phase shift range of 360deg with small insertion-loss variation of plusmn1.2 dB at 24 GHz. The chip is 0.33 mm2 in area and it consumes zero DC power.

A V-Band 8

This paper presents a fully integrated V-band 8 x 8 Butler matrix in 0.13-μm CMOS technology. Since the number of building blocks exponentially increases with the order of the Butler matrix, the constituted components, including quadrature hybrids, phase shifters, and crossovers, must be redesigned for single-chip implementation in silicon. Design equations and novel layout arrangements are described. A demonstrated 8 x 8 Butler matrix was implemented, which has the compact chip size of 1.45 x 0.93 mm2, no dc power consumption, and low average loss of 3.1 dB. Eight spatial beams with the averaged 5.9 dBi gain and 0.6° main-beam direction tolerance were obtained in 56 to 66 GHz.

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This paper presents compact CMOS quadrature hybrids by using the transformer over-coupling technique to eliminate significant phase error in the presence of low-Q CMOS components. The technique includes the inductive and capacitive couplings, where the former is realized by employing a tightly inductive-coupled transformer and the latter by an additional capacitor across the transformer winding. Their phase balance effects are investigated and the design methodology is presented. The measurement results show that the designed 24-GHz CMOS quadrature hybrid has excellent phase balance within plusmn0.6deg and amplitude balance less than plusmn 0.3 dB over a 16% fractional bandwidth with extremely compact size of 0.05 mm2. For the 2.4-GHz hybrid monolithic microwave integrated circuit, it has measured phase balance of plusmn0.8deg and amplitude balance of plusmn 0.3 dB over a 10% fractional bandwidth with a chip area of 0.1 mm2 .

8 CMOS Butler Matrix MMIC

A 25-GHz CMOS phased array receiver front-end with full-range beam steering is presented. The entire beam steering range is divided into five subsectors, where in each subsector the receive beam is steered by vector distribution and weighted vector combination of the received signals from array antennas. Such architecture has lower circuit complexity and less power consumption because no complicated full-range variable phase shifters and multiphase voltage-controlled oscillators, challenging in CMOS technology, are required. The implemented 0 13 μm CMOS phased array MMIC consumes lower than 30 mW and takes only a small area of 1.43 mm2. The measured array factors at various incident angles are demonstrated. It has 10–12 dB measured power gain and 9–10.5 dB noise figure in 24.5–26 GHz.

Compact

This letter presents the design and implementation of a continuous phase shifter MMIC using a 0.18-μm standard CMOS process. It consists of five stages of reflection-type phase shifter (RTPS), where each stage contains a over-coupling broadside coupler loaded with accumulation-mode MOSFET varactors. The measured maximum phase tuning range reaches 302° at 40 GHz and remains greater than 180° up to 100 GHz. Within 40-100 GHz, the average insertion loss is 13 dB, while the loss variation across the phase tuning range is ±4.3 dB at 40 GHz, and decreases to ± 2.5 dB at frequencies beyond 60 GHz. This chip has a compact size of 0.36×0.5 mm2 and consumes zero DC power.

S

A 27-GHz monolithic distributed oscillator based on the reverse-gain mode of a distributed amplifier is presented. The backward current in the drain line, which is typically absorbed by a drain resistor, is purposely used as a feedback signal to drive oscillation. The derived on-set oscillation condition shows that the transconductance of transistor and feedback length determine the oscillation frequency. This brings an advantage of frequency tuning solely by controlling the gate bias voltage. The proposed feedback from the backward current also brings layout convenience due to the close location of the backward current node and the gate node. A three-stage distributed oscillator is designed with the 0.1 mum-pHEMT process to demonstrate the proposed method. The measured 15plusmn0.9 dBm output power is obtained for oscillation frequency tuned from 26.4 GHz to 27.4 GHz.