Jennifer Q. Trelewicz

Efficient integer implementations for faster linear transforms

Higher throughput requirements in image processing systems require faster implementations of the underlying transforms. A new architecture for efficient implementations of linear, orthogonal transforms is discussed, with specific examples developed for the 2-D DCT in image compression. It is shown that the methods described in this paper can provide lower real estate usage in FPGAs by as much as 3-4 /spl times/, as well as reduction in execution cycles by about 30 % on a range of embedded processors where more clock cycles are required for multiplication than for addition.

Theory and Implementation of a Computationally Efficient Decimation Filter for Power-Aware Embedded Systems

As analog-to-digital converters become faster, this will allow them to become closer to their intended sensor. This will foster an environment that will continue to allow a paradigm shift in which digital systems replace analog ones, thus mitigating many nonideal effects, lowering costs, and providing more compact computational platforms. In parallel with this trend, the importance of decimation filters will continue to expand, as the high-speed data will need to be downsampled prior to ingestion by a decision-making element, such as a digital signal processor running constant false alarm rate (CFAR) algorithms, neural networks, and the like. Ideally, these decimation filters should have as much stopband attenuation as possible and should not be hindered by timing bottlenecks. However, on a fixed-point processor, like a field-programmable gate array (FPGA), finite word-length effects are in opposition to this goal. To break this nexus, this paper employs a revolutionary integerization technique based on multidimensional continued fractions strategically coupled with an efficient multiplierless architecture design strategy. Multidimensional continued fractions have been known within the mathematical community for some time, which include the popular Furtwangler algorithm and the ordered Jacobi-Perron algorithm, but have been left unexplored in the engineering community until recently. Simultaneous rational representations (SRRs) are another member of the multidimensional continued fraction family and are employed here to create fixed integer transforms with computationally optimal representations. In addition, this paper also focuses on hardware implementations in low-cost FPGAs or application-specific integrated circuits, which benefit from multiplierless implementation to save hardware real estate. From a computational perspective, carefully choosing how to represent the coefficients of a transform may have dramatic effects on how many operations are consumed to implement it. In a low-order example, the number seven may be expressed as 23-20 or 22 +21+20. This concept coupled with SRRs is explored in this paper to yield low-power high-speed implementations for embedded systems

Analysis of Business Connections Utilizing Theory of Topology of Random Graphs

A business ecosystem is a system that describes interactions between organizations. In this paper, we build a theoretical framework that defines a model which can be used to analyze the business ecosystem. The basic concepts within the framework are organizations, business connections, and market, that are all defined in the paper. Many researchers analyze the performance and structure of business using the workflow of the business. Our work in business connections answers a different set of questions, concerning the monetary value in the business ecosystem, rather than the task‐interaction view that is provided by workflow analysis.We apply methods for analysis of the topology of complex networks, characterized by the concepts of small path length, clustering, and scale‐free degree distributions. To model the dynamics of the business ecosystem we analyze the notion of the state of an organization at a given instant of time. We point out that the notion of state in this case is fundamentally different fro...

EFFICIENT COMPUTATION OF MULTIPLIERLESS FILTERS IN EMBEDDED SYSTEMS EMPLOYING AN OPTIMAL APPROXIMATION METHOD

An integerization technique for creating fixed integer transforms with computationally optimal representations is presented, and the improved performance in embedded systems by employing these integerized implementations is explored. This technique uses an optimal approximation algorithm that finds the lowest-length fractional representation of the rational numbers. The integer transform approximation allows multiplication to be replaced by shift-and-add operations in hardware systems; where multiplication can take several cycles, shifts and adds take one or fewer cycles each. The multiplierless implementation furthermore benefits from employing the proposed method to represent the floating-point coefficients in very high precision requirement areas, like decimation filter design. This paper is strongly oriented around the design of coefficients with hardware constraints in mind, such as minimizing the number of required adds/subtracts and shifts required for some engineering algorithms.

Analysis of business process and capability hypergraphs

Business process modelling is receiving renewed attention as businesses restructure their business partnerships, sourcing agreements, and production arrangements. However, although processes may be connected to the strategic elements of a business, the process graphs are not themselves business models. When a business is restructured, either in terms of organization or in terms of strategic direction, process graphs may be completely changed. We discuss in this paper the linking of process and capability models with hypergraphs, facilitating richer modelling and analysis of the business.

Numerical recognition of unconstrained handwriting

This paper investigates the collaboration of three numeral recognition techniques that will detect unconstrained handwritten numerals. Our research focuses on a feature-based approach, a method using eigenimages, and a structural analysis approach using wavelet transforms. These approaches will generate an estimate for the input numeral and a corresponding confidence value that in combination, yield a final decision. This paper shows that each individual method performs with a detection rate of better than 80%, and by combining the detection strategies, detection rates up to 94% are observed.

Fast DCT domain image shifting and merging

In high-speed color image processing applications, the manipulation of DCT domain images in real time is often required. Because of throughput requirements, operations necessary for the building of a printer page, such as merging and shifting, cannot be performed in the sampled domain since the overhead associated with the DCT slows computation. In this paper we present an efficient method for the merging or shifting of JPEG-compressed images, performed in the DCT domain to avoid additional overhead. The algorithm exploits quantization to achieve further gains. The resulting algorithm can save between 25 % and 75 % of the required operation cycles in a typical image processing system.