Jens Peer Ing Grad Stengl
Siemens
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Featured researches published by Jens Peer Ing Grad Stengl.
international electron devices meeting | 1998
Gerald Dr. Deboy; N. Marz; Jens Peer Ing Grad Stengl; Helmut Strack; Jenoe Tihanyi; Hans Weber
For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.
international electron devices meeting | 1980
Ludwig Dipl.-Ing. Leipold; W. Baumgartner; Wilhelm Ladenhauf; Jens Peer Ing Grad Stengl
The SIPMOS (Siemens Power MOS) technology was developed for power MOSFETs as well as a. c. power switches in which MOS technology is functionally combined with bipolar devices. This technology which has process steps like those of conventional integrated MOS circuits was used to realize a FET-controlled thyristor. The SIPMOS thyristor shows excellent qualities with regard to on-state current (di/dt=4000 A/us) voltage immunity (dV/dt > 1200 V/us), and firing sensitivity.
international electron devices meeting | 1981
Jens Peer Ing Grad Stengl; Helmut Strack; Jenoe Tihanyi
High-voltage MOS transistors with blocking voltages of up to 1000 V and turn-on resistances of less than 2 Ω were developed and tested. The transistor structure itself is that of a vertical SIPMOS+(1) power transistor. Retaining this technology, a special design of the cell field and a new type of chip edge construction became necessary in order to achieve the quoted values. The required constructional dimensions were obtained with the aid of a two-dimensional modelling program. (+SIPMOS = Siemens Power MOS)
Archive | 1981
Ludwig Dipl.-Ing. Leipold; Jens Peer Ing Grad Stengl; Jenö Dr. Tihanyi
Archive | 1981
Wilhelm Ladenhauf; Ludwig Dipl.-Ing. Leipold; Jens Peer Ing Grad Stengl; Jenö Dr. Tihanyi
Archive | 1984
Peter Huber; Jens Peer Ing Grad Stengl; Jenö Dr. Tihanyi
Archive | 1982
Jens Peer Ing Grad Stengl; Helmut Strack; Jenö Dr. Tihanyi
Archive | 1981
Ludwig Dipl.-Ing. Leipold; Jens Peer Ing Grad Stengl; Jenö Dr. Tihanyi
Archive | 1982
Jens Peer Ing Grad Stengl; Helmut Strack; Jenö Dr. Tihanyi
Archive | 1980
Jenö Dr. Tihanyi; Peter J. Huber; Jens Peer Ing Grad Stengl