Jeonhak Moon

Design of H.264/AVC entropy decoder without internal ROM/RAM memories

This paper proposes an H.264/AVC entropy decoder without embedded processor or internal ROM/RAM memories. Conventional H.264/AVC entropy decoders have large internal ROM/RAM memories in context-adaptive variable length decoder. This requires special ROM/RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, they require embedded processors for bitstream manipulation, which increases area and power consumption. This paper proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, it exploits optimized lookup tables and internal buffers without internal ROM/RAM, which reduces hardware size and can be implemented in general digital logic fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. It supports QCIF, CIF, QVGA, and VGA format, and its maximum operation frequency is 125 MHz.

Hardware implementation of HEVC CABAC encoder

CABAC is high-compression-ratio entropy coding in HEVC, but it is difficult to be parallelized for speedup. In this paper, a pipelined HEVC CABAC architecture is proposed to increase operating frequency. The proposed CABAC encoder was implemented in 0.18um technology with 158 MHz operating frequency and 45,088 gate counts.