Jérôme Billoué

N-Type Porous Silicon Substrates for Integrated RF Inductors

To study the effect of various n-type substrates on high-frequency inductor performances, several devices were integrated on porous silicon (PS), silicon (Si), and glass. Both n-type mesoporous Si and mesoporous/macroporous Si bilayers were fabricated. The analysis further shows that PS reduces significantly the substrate losses. Indeed, higher quality factors have been obtained for the inductors integrated on PS than on the Si substrate and particularly in the case of bilayer structures. These original results can be added to p-type PS performances already shown in the literature. Then, this work demonstrates that PS can also be a promising candidate for the integration of passive and active devices on n-type silicon.

RF performances of inductors integrated on localized p + -type porous silicon regions

To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate.

Porous Silicon/Silicon Hybrid Substrate Applied to the Monolithic Integration of Common-Mode and Bandpass RF Filters

In order to develop high performances and miniaturized devices for RF communications, monolithic integration becomes an important challenge for microelectronics industries. Bandpass filters and common-mode filter have been integrated on 6-in porous silicon (PS)/silicon hybrid substrates with PS regions under passive devices. An improvement of the rejection level on common mode was demonstrated on PS regards to low-resistivity silicon. Furthermore, the bandwidth differential was increased regards to bulk silicon and, thus, allows the development of devices for high-speed communications systems.

Non-oxidized porous silicon-based power AC switch peripheries

We present in this paper a novel application of porous silicon (PS) for low-power alternating current (AC) switches such as triode alternating current devices (TRIACs) frequently used to control small appliances (fridge, vacuum cleaner, washing machine, coffee makers, etc.). More precisely, it seems possible to benefit from the PS electrical insulation properties to ensure the OFF state of the device. Based on the technological aspects of the most commonly used AC switch peripheries physically responsible of the TRIAC blocking performances (leakage current and breakdown voltage), we suggest to isolate upper and lower junctions through the addition of a PS layer anodically etched from existing AC switch diffusion profiles. Then, we comment the voltage capability of practical samples emanating from the proposed architecture. Thanks to the characterization results of simple Al-PS-Si(P) structures, the experimental observations are interpreted, thus opening new outlooks in the field of AC switch peripheries.

P type porous silicon resistivity and carrier transport

The resistivity of p type porous silicon (PS) is reported on a wide range of PS physical properties. Al/PS/Si/Al structures were used and a rigorous experimental protocol was followed. The PS porosity (P%) was found to be the major contributor to the PS resistivity (ρPS). ρPS increases exponentially with P%. Values of ρPS as high as 1 × 109 Ω cm at room temperature were obtained once P% exceeds 60%. ρPS was found to be thermally activated, in particular, when the temperature increases from 30 to 200 °C, a decrease of three decades is observed on ρPS. Based on these results, it was also possible to deduce the carrier transport mechanisms in PS. For P% lower than 45%, the conduction occurs through band tails and deep levels in the tissue surrounding the crystallites. When P% overpasses 45%, electrons at energy levels close to the Fermi level allow a hopping conduction from crystallite to crystallite to appear. This study confirms the potential of PS as an insulating material for applications such as power e...

RF Planar Inductor Electrical Performances on n-Type Porous 4H Silicon Carbide

For the first time, inductors were integrated on porous silicon carbide to study the effect of this substrate on radio-frequency (RF) performances. n-Type heavily doped 4H-SiC substrates were anodized in an HF-based electrolyte to produce 6- and 15-μm-thick porous layers. An improvement of the quality factor was demonstrated on porous SiC with regard to SiC bulk. This promising result shows the decrease of substrate losses at the high frequencies with the porous SiC substrate. Thus, porous SiC could have an interest for the integration of RF power devices.

In situ investigation of mesoporous silicon oxidation kinetics using infrared emittance spectroscopy.

In this paper, we study the thermal oxidation kinetics of mesoporous silicon layers, synthesized by electrochemical anodization, from 260 °C up to 1100 °C. A specific apparatus is employed to heat the mesoporous samples in air and to record at the same time their infrared emittance. Based on Bruggeman effective medium approximation, an optical model is set up to realistically approximate the dielectric function of the porous material with an emphasis on the surface chemistry and oxide content. A transition temperature of 600 °C is evidenced from data processing which gives evidence of two oxidation mechanisms with distinct kinetics. Between 260-600 °C, the oxidation is surface-limited with kinetics dependent on the hydrogen desorption rate. However, above 600 °C, the oxide growth is limited by oxygen diffusion through the existing oxide layer. A parabolic law is employed to fit the oxidation rate and to extract the high-temperature activation energy (EA = 1.5 eV). A precise control of the oxide growth can thus be achieved.

Copper-selective electrochemical filling of macropore arrays for through-silicon via applications

In this article, the physico-chemical and electrochemical conditions of through-silicon via formation were studied. First, macropore arrays were etched through a low doped n-type silicon wafer by anodization under illumination into a hydrofluoric acid-based electrolyte. After electrochemical etching, ‘almost’ through-silicon macropores were locally opened by a backside photolithographic process followed by anisotropic etching. The 450 × 450-μm² opened areas were then selectively filled with copper by a potentiostatic electrochemical deposition. Using this process, high density conductive via (4.5 × 105 cm−²) was carried out. The conductive paths were then electrically characterized, and a resistance equal to 32 mΩ/copper-filled macropore was determined.

Shape-controlled electrochemical synthesis of mesoporous Si/Fe nanocomposites with tailored ferromagnetic properties

This study reports on an original and efficient way to synthesize iron nanowires and cubic-shaped nanoparticles by electrochemical deposition on a mesoporous silicon host and its impact on magnetic properties. The selective growth of iron nanostructures inside the pores can be achieved, thanks to the presence of a native oxide layer on the pore walls, suggesting a surface-state assisted electrochemical process. Because of hydrogen coevolution, the pH of the solution controls the shape of the iron nanostructures (particles or wires) while the electrodeposition current density can be adjusted to suppress the parasitic deposition on top of the structure. Under optimal conditions, nanowires with lengths up to 2 μm are synthesized after 15 seconds of deposition. Magnetic characterization of the ferromagnetic nanowire composite exhibits an easy axis of magnetization in the pore direction due to shape anisotropy with a remanence ratio of 0.6. The shape anisotropy of the nanoparticle composite is weaker than for the nanowire composite because of the homogeneous dispersion of the particles. The versatility of the mesoporous silicon framework is thus a considerable asset to tune the nanocomposite’s magnetic properties.

Backside silicon-embedded inductor using porous silicon layer for substrate effect suppression

In this paper, a backside silicon-embedded inductor (BSEI) using a porous silicon (PS) layer is proposed and studied for substrate effect suppression. The PS layer has a lower effective permittivity and a much higher effective resistivity than the silicon substrate, and therefore can form a good insulation layer to suppress the capacitive substrate effect. With the PS layer, the peak quality factor of a 1-mm2 BSEI can be increased from 6.2 to over 11 for a PS layer thickness of 40 μm, with the operating frequency increased from around 70 MHz to over 200 MHz. This makes the BSEI more promising for power supply-on-chip applications.