Ji Sim Jung

The effect of moisture on the photon-enhanced negative bias thermal instability in Ga–In–Zn–O thin film transistors

We investigated the impact of photon irradiation on the stability of gallium-indium-zinc oxide (GIZO) thin film transistors. The application of light on the negative bias temperature stress (NBTS) accelerated the negative displacement of the threshold voltage (Vth). This phenomenon can be attributed to the trapping of the photon-induced carriers into the gate dielectric/channel interface or the gate dielectric bulk. Interestingly, the negative Vth shift under photon-enhanced NBTS condition worsened in relatively humid environments. It is suggested that moisture is a significant parameter that induces the degradation of bias-stressed GIZO transistors.

Bottom-Gate Gallium Indium Zinc Oxide Thin-Film Transistor Array for High-Resolution AMOLED Display

The fabrication process and the characteristics of bottom-gate Ga2O3-In2O3-ZnO (GIZO) thin-film transistors (TFTs) are reported in detail. Experimental results show that oxygen supply during the deposition of GIZO active layer and silicon oxide passivation layer controls the threshold voltage of the TFT. The field-effect mobility and the threshold voltage of the GIZO TFT fabricated under the optimum process conditions are 2.6 cm2/V ldr s and 3.8 V, respectively. A 4-in QVGA active-matrix organic light-emitting diode display driven by the GIZO TFTs without any compensation circuit in the pixel is successfully demonstrated.

The impact of gate dielectric materials on the light-induced bias instability in Hf–In–Zn–O thin film transistor

This study examined the effect of gate dielectric materials on the light-induced bias instability of Hf–In–Zn–O (HIZO) transistor. The HfOx and SiNx gated devices suffered from a huge negative threshold voltage (Vth) shift (>11 V) during the application of negative-bias-thermal illumination stress for 3 h. In contrast, the HIZO transistor exhibited much better stability (<2.0 V) in terms of Vth movement under identical stress conditions. Based on the experimental results, we propose a plausible degradation model for the trapping of the photocreated hole carrier either at the channel/gate dielectric or dielectric bulk layer.

Thermal Analysis of Degradation in Ga2O3-In2O3-ZnO Thin-Film Transistors

Degradation of Ga2O3–In2O3–ZnO (GIZO) thin-film transistors (TFTs), which are promising for driving circuits of next-generation displays, was studied. We found a degradation mode that was not observed in silicon TFTs. A parallel shift without any change of the transfer curve was observed under gate voltage stress. Judging from the bias voltage dependences we confirmed that the mode was mainly dominated by a vertical electric field. Thermal distribution was measured to analysis the degradation mechanism. Joule heating caused by drain current was observed; however, a marked acceleration of degradation by drain bias was not found. Therefore, we concluded that Joule heating did not accelerate degradation. Recovery of electrical properties independent of stress voltage were observed.

The Impact of Device Configuration on the Photon-Enhanced Negative Bias Thermal Instability of GaInZnO Thin Film Transistors

We investigated the effect of device configuration on the light-induced negative bias thermal instability of gallium indium zinc oxide transistors. The V th of back-channel-etch (BCE)-type transistors shifted by ―3.5 V, and the subthreshold gate swing (SS) increased from 0.88 to 1.38 V/decade after negative bias illumination temperature stress for 3 h. However, etch-stopper-type devices exhibited small V th shifts of ―0.8 V without degradation in the SS value. It is believed that the inferior instability of the BCE device is associated with the formation of an interfacial molybdenum (Mo) oxychloride layer, which occurs in the course of dry etching Mo using Cl 2 /O 2 for source/drain patterning.

Influence of Illumination on the Negative-Bias Stability of Transparent Hafnium–Indium–Zinc Oxide Thin-Film Transistors

The stability of transparent hafnium-indium-zinc oxide (HIZO) thin-film transistors (TFTs) was investigated under negative-bias stress conditions. TFTs that incorporate transparent electrode materials such as indium-tin oxide or indium-zinc oxide were studied, and the bias stress experiments showed that transparent TFTs undergo severe degradation (negative shift in threshold voltage VT) with simultaneous exposure to white light, in comparison with the results obtained in dark. The time evolution of VT indicates that the deterioration under illumination occurs mainly by the trapping of photogenerated carriers near the HIZO/dielectric interface.

The impact of SiNx gate insulators on amorphous indium-gallium-zinc oxide thin film transistors under bias-temperature-illumination stress

The threshold voltage instability (Vth) in indium-gallium-zinc oxide thin film transistor was investigated with disparate SiNx gate insulators under bias-temperature-illumination stress. As SiNx film stress became more tensile, the negative shift in Vth decreased significantly from −14.34 to −6.37 V. The compressive films exhibit a nitrogen-rich phase, higher hydrogen contents, and higher N–H bonds than tensile films. This suggests that the higher N–H related traps may play a dominant role in the degradation of the devices, which may provide and/or generate charge trapping sites in interfaces and/or SiNx insulators. It is anticipated that the appropriate optimization of gate insulator properties will help to improve device reliability.

Experimental and Theoretical Analysis of Degradation in Ga2O3–In2O3–ZnO Thin-Film Transistors

Degradation of Ga2O3–In2O3–ZnO (GIZO) thin-film transistors (TFTs), which are promising for driving circuits of next-generation displays, was studied. We evaluated degradation caused by applying gate voltage and drain voltage stress. A parallel shift of the transfer curve was observed under gate voltage stress. The amount of threshold voltage shift when applying gate and drain voltage stress was smaller than that in the case of only gate voltage stress. Joule heating caused by the drain current was observed. We reproduced this degradation of transfer curve change by device simulation. When we assumed the trap level as the density of state (DOS) model and increased two kinds of trap density, we obtained properties that show the same trends as the experimental results. We concluded that two degradation mechanisms occur under gate and drain voltage stress conditions. # 2009 The Japan Society of Applied Physics

The Effect of Passivation Layers on the Negative Bias Instability of Ga-In-Zn-O Thin Film Transistors under Illumination

Ga-In-Zn-O (GIZO) thin film transistors (TFTs) with disparate passivation structures were fabricated and their stabilities were compared. The devices were subjected to a negative bias stress with simultaneous exposure to visible light. TFT that incorporates a dual passivation composed of a SiO x layer grown at a relatively high temperature with an additional SiN x film deposited shows only -0.8 V V th shift, whereas a -5.7 V shift was observed for a TFT covered by a single SiO 2 film. The device degradation is susceptible to the ability of protecting external moisture, which may adsorb on the surface of the GIZO semiconductor to create donor states therein.

Investigation of Light-Induced Bias Instability in Hf-In-Zn-O Thin Film Transistors: A Cation Combinatorial Approach

Thin Film Transistors: A Cation Combinatorial Approach Jang-Yeon Kwon, Ji Sim Jung, Kyoung Seok Son, Kwang-Hee Lee,* Joon Seok Park, Tae Sang Kim, Jin-Seong Park, Rino Choi, Jae Kyeong Jeong, Bonwon Koo, and Sangyun Lee Display Laboratory, Samsung Advanced Institute of Technology, Nongseo-Dong, Giheung-Gu, Yongin-Si, Gyeonggi-Do 446-712, Korea Department of Materials Science and Engineering, Dankook University, Anseo-Dong, Cheonan 330-714, Korea Department of Materials Science and Engineering, Inha University, Incheon 402-751, Korea