Jiarui Liu

Design of a broadband Ka-band MMIC LNA using deep negative feedback loop

In this paper, we present a broadband Ka-band LNA using 0.15-μm GaAs pseudomorphic high electron mobility transistor (pHEMT) process. By using bandwidth enhancement techniques and deep negative feedback technology, the LNA achieves relatively broadband performances. The LNA attains 20 dB small signal gain from 25 to 40GHz and shows a measured noise figure of 2.8 dB from 25 to 40GHz with 230-mW dc power consumption. The input and output return loss of the LNA is less than 8 dB, which is competitive compared with other published Ka-band LNAs. The size of the chip is 2.5mm × 1.2mm.

A New Digital to Analog Converter Based on Low-Offset Bandgap Reference

This paper presents a new 12-bit digital to analog converter (DAC) circuit based on a low-offset bandgap reference (BGR) circuit with two cascade transistor structure and two self-contained feedback low-offset operational amplifiers to reduce the effects of offset operational amplifier voltage effect on the reference voltage, PMOS current-mirror mismatch, and its channel modulation. A Start-Up circuit with self-bias current architecture and multipoint voltage monitoring is employed to keep the BGR circuit working properly. Finally, a dual-resistor ladder DAC-Core circuit is used to generate an accuracy DAC output signal to the buffer operational amplifier. The proposed circuit was fabricated in CSMC 0.5źźm 5źV 1P4M process. The measured differential nonlinearity (DNL) of the output voltages is less than 0.45 LSB and integral nonlinearity (INL) less than 1.5 LSB at room temperature, consuming only 3.5źmW from a 5źV supply voltage. The DNL and INL at ź55°C and 125°C are presented as well together with the discussion of possibility of improving the DNL and INL accuracy in future design.