Jie Tao Diao

PCI Express-Based NVMe Solid State Disk

This paper presents a new architecture SSD based on NVMe (Non-Volatile Memory express) protocol. The NVMe SSD promises to solve the conventional SATA and SAS interface bottleneck. Its aimed to present a PCIe NAND Flash memory card that uses NAND Flash memory chip as the storage media. The paper analyzes the PCIe protocol and the characteristics of SSD controller, and then gives the detailed design of the PCIe SSD. It mainly contains the PCIe port and Flash Translation Layer.

Design and Implementation of ARM-Based Intelligent Switchgear Control System

With the current domestic and international research and development technology, a new intelligent low-voltage switchgear control system is realized by ARM-based, with highly integrated, low-cost hardware and software design.The paper introduced the overall process of hardware design and software design. The system has been proved that the ability to realize the low-voltage distribution system monitoring and management, with open and close, open circuit detection, temperature and humidity measurement and control functions and intelligent, digital, low power consumption, and interference characteristics.

A Study on Reconfiguring On-Chip Cache with Non-Volatile Memory

NVM has become a promising technology to partly replace SRAM as on-chip cache and reduce the gap between the core and cache. To take all advantages of NVM and SRAM, we propose a Hybrid Cache, constructing on-chip cache hierarchies with different technologies. As shown in article, hybrid cache performance and power consumption of Hybrid Cache have a large advantage over caches base on single technologies. In addition, we have shown some other methods that can optimize the performance of hybrid cache.

Design and Implementation of OTP Base on MD5

Encryption of information is getting increasingly large attention, due to the popularity of internet and the advance of technology. One of the encryption algorithms, MD5, is commonly used in data encryption nowadays. In this paper, MD5 algorithm was briefly described and used to construct a dynamic password encryption technique with time parameters. This dynamic password has no internal relevance, which means the new password can not be derived using previous passwords. Generation of password also takes a relative short time frame, such that in theory the encryption system can not be breached.

Design and Realization of High Precision Time Interval Measurement Peripheral Circuit Based on FPGA

it introduces a design and realization of high precision time interval measurement peripheral circuit based on FPGA, which can realize the high speed data sampling, high speed series to parallel converting, USB data transferring. The system verification under virtex4 XC4SX35-FF668 of Xilinx is carried out. The test result shows that the design can detect the signal as low as -8mV, the valve voltage works stably and each module work normal.

Realization of Multi-Channel, High-Speed Waveform Generator Based on FPGA

This paper introduces the design and realization of a multi-channel high-speed waveform generator based on FPGA, Which consists of the high-speed clock generator, the high-speed high-precision digital to analog converter, multi-stage pipeline accumulator and high-speed small signal conditioning. At last, it gives some simulation. The results show that the output signal type of this waveform generator is rich, and the maximum output frequency is 80MHz. The waveform generator can be used in the fields which require multi-channel high-speed signal, such as phased array radar.

A Correction Method for Time to Digital Converter

The hardware structure and the data-processing flow of FPGA based Time to Digital Converter (TDC) are introduced firstly in the essay. Then, according to the issue of inaccuracy in arriving time of external triggers, a correction method is proposed to enhance the accuracy of starting time. In the end, by contrast experiment, it is shown that this correction method could improve the accuracy of starting time effectively. In addition, the minimum time resolution is 400ps, which makes the TDC be adequate for applications in the fields which require high-resolution time measurement, for example, in the application of time-of-flight mass spectrometer (TOF-MS).

The Implementation of a RAM Disk

RAM disk uses the memory of a computer to construct a high speed, high reliable storage space. Though it is useful, there is little information on the development of RAM disk, especially on Microsoft Windows platform. On Windows platform, RAM disk has to be realized though writing Windows drivers. Implement drivers for Windows is a challenging task that only a small group of programmer can handle for many years. Now, with the new Windows Driver Foundation (WDF), this task is much easier. In this paper, Microsoft’s skeleton RAM disk driver in Windows Driver Kit (WDK) was analyzed and modified. At last, a full function, resizable RAM disk driver was got.

A Simulation Method for Memristor Based Dopant Drift Model

Memristor is a kind of circuit element with nano scale, its appearance may radically change the traditional circuit. Recently, dopant drift model is a hot issue in research works connected to memristor. However, because of lack of transparency in the process of simulation, simulation method on dopant drift model of memristor needs to be strengthened. Dopant drift model was analyzed, circuit characteristics and relations between different circuit variables were studied. Based on those works above, a kind of numerical simulation method was designed to simulate and validate the memristor model. Simulation results show that the method designed accurately expresses conducting behaviour of memristor physical model, which provides a new feasible way for simulations of memristor model.

Bioelectrical Impedance Measurement Way Based on an Improved DPSD Algorithm

In Bioelectrical impedance measurement, the impedance accuracy is a very important parameter. With the analysis of general Digital Phase Sensitive Detection (DPSD) algorithm and its error, this paper presents an improved DPSD algorithm. In this method, it firstly decomposes the orthogonal signals which have passed through the networks, and then sums (minus) the relevant signals to get the parameters amplitude and phase. By this way, it can avoid errors caused by filtering operation in general DPSD algorithm. At last, the paper gives a simulation which can be hardware-based achieved. The result proves the effectiveness and feasibility of this improved method.