Zhao Lin Sun

PCI Express-Based NVMe Solid State Disk

This paper presents a new architecture SSD based on NVMe (Non-Volatile Memory express) protocol. The NVMe SSD promises to solve the conventional SATA and SAS interface bottleneck. Its aimed to present a PCIe NAND Flash memory card that uses NAND Flash memory chip as the storage media. The paper analyzes the PCIe protocol and the characteristics of SSD controller, and then gives the detailed design of the PCIe SSD. It mainly contains the PCIe port and Flash Translation Layer.

Lifetime-Aware Capacity Dynamic Adjusting for Solid State Disk

In this paper, we analyzed the endurance of Nand Flash memory and then proposed a level adjusting scheme to use the MLC Flash dynamically to storage different amount of data levels through the entire lifetime. The result shows that the MLC SSD adopting this method could be totally written 4.8X more data than conventional MLC SSD and 16.5% more than SLC SSD.

Large Capacity Cache Design Based on Emerging Non-Volatile Memory

A triple-level-cell (TLC) STT-RAM architecture was proposed basing on parallel MLC MTJ and serial MLC MTJ. A TLC STT-RAM cell can store three bit which will offer higher capacity density compared with SLC STT-RAM. The write process is also analyzed that it contains three types of basic states transitions. Through mapping soft, medium and hard domains to three individual cache lines, the access to soft lines can perform as accessing SLC STT-RAM-based cache. The amount of three-step operations is also much reduced. .

A High Speed and Compact Data Acquisition and Storage System

Data acquisition and record system plays an important role in signal processing. For the wideband signal acquisition and processing application, such as 3G/4G Base Stations, Wideband Microwave Backhaul, Military Communications, and RADAR, the need for high speed and smart software-defined radio (SDR) test platform is growing. In this paper, we implement a high compact form factor data acquisition and storage system used for the wideband signal application development. In order to implement high compact, low power and high speed real-time data storage, we use a PCIe-based switch architecture and leverage the Flash array as the storage part. The system supports RF sampling directly and offers a 16TB solid state storage module which could be read and write at the sustained speed of 12.8GB/s.

High-Speed and Anti-Interference Parallel Bus Design on Board

This paper presents a high-speed and anti-interference parallel bus design on board, which takes a series of measures, including source-synchronous technology, the negative feedback technology, low-voltage differential transmission technology, error correction coding and pseudo-random code technology to improve the environment for parallel communication, increase communication speed, decrease error rate .The final test shows the communication speed has achieved 10 Gbps and the error rate has reduced to 10-7.

The Implementation of a RAM Disk

RAM disk uses the memory of a computer to construct a high speed, high reliable storage space. Though it is useful, there is little information on the development of RAM disk, especially on Microsoft Windows platform. On Windows platform, RAM disk has to be realized though writing Windows drivers. Implement drivers for Windows is a challenging task that only a small group of programmer can handle for many years. Now, with the new Windows Driver Foundation (WDF), this task is much easier. In this paper, Microsoft’s skeleton RAM disk driver in Windows Driver Kit (WDK) was analyzed and modified. At last, a full function, resizable RAM disk driver was got.

Bioelectrical Impedance Measurement Way Based on an Improved DPSD Algorithm

In Bioelectrical impedance measurement, the impedance accuracy is a very important parameter. With the analysis of general Digital Phase Sensitive Detection (DPSD) algorithm and its error, this paper presents an improved DPSD algorithm. In this method, it firstly decomposes the orthogonal signals which have passed through the networks, and then sums (minus) the relevant signals to get the parameters amplitude and phase. By this way, it can avoid errors caused by filtering operation in general DPSD algorithm. At last, the paper gives a simulation which can be hardware-based achieved. The result proves the effectiveness and feasibility of this improved method.

Development of a High-Speed Ion Signal Acquisition System for Mass Spectrometer

Due to the rapid development of manufacturing technology, high-speed high-resolution data acquisition system has been widely applied in plenty of engineering fields, such as radar, environmental surveillance, mass spectrometry, etc. In order to satisfy the increasing requirement, we present the design of a high-speed data acquisition system, which is mainly composed of high-speed time-interleaved analog-to-digital converter, high data throughput interface based on 10 gigabit Ethernet. The detailed design and realization of each module are presented. Finally we test and analysis the performance of the ion signal acquisition system, and the results show that the system performs fine speed, high precision and stability.

Design and Implementation of Remote Destruction SSD

An implementation of a remote destruction solid state drive (SSD) was introduced in the design. The advanced technology of rapid data destruction, the technology of breakdown the flash with high-voltage pulse and the technology of GSM is combined together. As a result, user can operate through a simple command (text message or a call) to destroy all data in SSD, as long as the user confirms SSD is out of control. The method of erasing data and destroying the flash I/O are both executed, so the data can’t be recovered after destruction. At last, some tests are displayed to verify the performance of the remote destruction SSD.

Integrated Instrument of Ultra-High Speed Data Acquisition and Storage

Along with the rapid development of computer technology, high speed data acquisition and storage system has been widely applied in plenty of engineering fields, such as radar, aerospace industry, communication, etc. In order to satisfy the increasing requirement, we present the design structure of a novel integrated instrument for ultra-high speed data acquisition and storage, which is composed of ultra-high speed data acquisition, high speed data transmission and solid storage three main sub-systems. The detailed design and realization of the sub-systems are presented. We test and analysis the performance of the integrated instrument and the actual results show that the instrument performs stably and provides excellent speed and precision.