Jiri Dr Ing Dr Marek

Silicon pressure sensor with integrated CMOS signal-conditioning circuit and compensation of temperature coefficient

Abstract A silicon pressure sensor designed for automotive applications with on-chip signal conditioning is presented. The micromechanical processing steps are added to a standard 3 μm CMOS process. The membrane is etched in (100)-oriented Si by anisotropic etching with an electrochemical etch stop. Thickness control with tolerances of less than 0.5 μm is readily achieved. A complete CMOS evaluation circuit is integrated on the same device. The signal of the piezoresistive Wheatstone bridge is processed by an instrumentation amplifier with temperature-dependent amplification for on-chip compensation of the sensitivity variation with temperature. Moreover, the sensitivity variation itself, the offset and the offset variation with temperature are compensated. On-chip trimming is provided for the adjustment of these terms in the full automotive temperature range from −40 °C to + 125 °C.

The effects of thermal treatment on the anisotropic etching behavior of Cz- and Fz-silicon

Abstract We investigated the effects of stepwise thermal treatment of [100]-CZ- and FZ-silicon on the crystal defects and the etching behavior in KOH solutions. The anisotropy (the quotient of the vertical etch rate and the underetching of the mask), formed crystal defects as well as the surface roughness of the exposed {100}- and {111}-planes are examined. Thermal treatment of the silicon substrate can result in a precipitation of the interstitial oxygen. The precipitated oxygen causes elastic stress in the crystal which can be relieved by a generation of defects [1] , [2] . We found out that the evolution of these defects accelerates the lateral etch rate considerably. For the reference, the samples without thermal treatment the anisotropy has a value of 120 for FZ-silicon and 70 for CZ-silicon, respectively. However, with rising temperature and process time the anisotropy decreases to 30 for FZ-silicon and 15 for CZ-silicon. At the same time, the surface quality of the {100}- and {111}-planes degrades with increasing temperature. The roughness value Ra rises from 5 nm to approximately 30 nm. Along with the variation of the etching behavior during thermal treatment, we further present a suitable model for the oxygen-dependence of the etch rate.

Fully Integrated Silicon Pressure Sensor with On-Chip CMOS Evaluation Circuit and On-Chip Trimming

A silicon pressure sensor with an integrated signal conditioning circuit has been developed for automotive applications. The sensor is fabricated with a standard 3μm CMOS process. The membrane is formed by anisotropic etching in (100)-oriented silicon using an electrochemical etch stop. A complete signal conditioning circuit is added to amplify the Bridge output signal. Furthermore, the sensor offset, the sensitivity, and the temperature effects on offset and sensitivity values are adjusted individually. Compensation is done for a temperature range from −40 to +125°C. On-chip trimming is provided for the adjustment of the correction values.