Jiun-Jye Chang

Influence of positive bias stress on N2O plasma improved InGaZnO thin film transistor

A post-treatment using N2O-plasma is applied to enhance the electrical characteristics of amorphous indium gallium zinc oxide thin film transistors. Improvements in the field-effect mobility and the subthreshold swing demonstrate that interface states were passivated after N2O-plasma treatment, and a better stability under positive gate-bias stress was obtained in addition. The degradation of mobility, resulted from bias stress, reduces from 6.1% (untreated devices) to 2.6% (N2O-plasma treated devices). Nevertheless, a strange hump characteristic occurs in transfer curve during bias stress, inferring that a parasitic transistor had been caused by the gate-induced electrical field.

Behaviors of InGaZnO thin film transistor under illuminated positive gate-bias stress

In this letter, we investigate the impact of the light illumination on the stability of indium–gallium– zinc oxide thin film transistors under positive gate-bias stress. The noticeable decrease in threshold voltage Vt shift more than 5.5 V under illuminated positive gate-bias stress indicates a superior reliability in contrast with the dark stress. The accelerated Vt recovery characteristic compared with dark recovery demonstrates that the charge detrapping effect was enhanced under illumination. Furthermore, the average effective energy barrier of charge trapping and detrapping was derived to verify that illumination can excite the trapped charges and accelerate the charge detrapping process.

Light-induced instability of an InGaZnO thin film transistor with and without SiOx passivation layer formed by plasma-enhanced-chemical-vapor-deposition

This paper investigates the illuminated behaviors of InGaZnO thin film transistors with and without a SiOx passivation. For the passivated device, more interface states were generated during SiOx passivation layer deposition by plasma-enhanced-chemical-vapor-deposition. The enhanced trap-assisted photoexcited hole generation induces source side barrier lowering and causes an apparent subthreshold stretch-out phenomenon. However, for the unpassivated device, the fact that the threshold voltage shift in ambient oxygen is lower than in vacuum under light illumination suggests oxygen desorption and readsorption occurs simultaneously, which is consistent with the accelerated recovery rate in oxygen ambiance.

P‐15: Bias Stress Reliability for w/ and w/o Oxide‐passivated IGZO TFTs

The behaviors of dynamic gate bias stress for Indium-Gallium-Zinc-Oxide (IGZO) TFTs were investigated in this study. The device after storage represents a parasitic traneffect after positive gate bias stress. Furthermore, the stability of IGZO TFTs can be improved by adding passivation layer.

Employ Present Five Masks Amorphous Silicon Thin-Film Transistor Design and Process Flow to Realize 5-in. InGaZnO Active-Matrix Liquid Crystal Display with Improved Stress Stability

The present five masks bottom gate and staggered amorphous silicon (a-Si) thin-film transistor (TFT) process flow is not suitable for indium–gallium–zinc-oxide (IGZO) TFT because of its vulnerability to post etching process during the source/drain pattern. Bottom gate and coplanar IGZO TFTs were made feasible through the reverse of second (channel layer) and third (source/drain electrodes) masks process flow to avoid etching damage problem. Besides, the post IGZO nitrous oxygen (N2O) plasma treatment was employed to improve the stress instability. On the basis of secondary ion mass spectrometry (SIMS) and X-ray spectroscopy (XPS) results, it is believed that the post N2O plasma treatment passivates the interface states and converts the inhomogeneous and low quality IGZO to the homogeneous and high quality IGZO. In the end, a 5-in. IGZO active-matrix liquid crystal display was demonstrated via five masks bottom gate and coplanar TFT configuration.

P‐20: An Efficient Method for Improving the Negative‐Bias‐Temperature‐Stress (NBTS) Stability of Amorphous In‐Ga‐Zn‐O TFT

An efficient method of preparing a α-IGZO TFT with better negative-bias-temperature-stress (NBTS) stability is presented. When the α -IGZO TFT is used as the switch of a pixel, it suffers a long time NBTS. The NBTS of α -IGZO TFT would cause the Vth shift toward negative value, and thus increase the leakage current which leads to the pixel voltage drop when pixel is holding. In this work, some post-IGZO plasma treatments methods are studied for the optimized NBTS stability process. with N2O plasma treatment being employed, the α -IGZO TFT shows excellent NBTS stability.

Sensitivity enhancement of ion sensors by charge trapping on Extended Gate Field Effect Transistors

Electrolyte-insulator-semiconductor (EIS) and Extended-gate Field Effect Transistor (EGFET) devices with programmable HfO2/Si3N4/SiO2 structures are demonstrated for pH detection. The proposed programmable EIS and EGFET sensors with pH sensing membranes exhibit a high pH sensitivity (larger than the ideal Nernstain response, 59.16 mV/pH at 25°C) owing to the hydrogen ions attraction by electrons trapped within the embedded trapping layer(Si3N4) after programming. When compared with the conventional devices, the programmable sensors with programming provide the possibility for the small pH fluctuation detection and can be used in future pH sensor applications owing to its high pH sensing response.

P-191: Embedded Nano-Si Optical Sensor in TFT-LCDs Technology and Integrated as Touch-Input Display

We report the controllable UV-Visible-to-NIR Si-nanocrystals photonic sensor, photo-spectrum band-gap engineering technology, and integrated in TFT-LCD as multi-function intelligent display. Photonic Sensor using Si-nanocrystals as sensitizer sandwiched between two electrodes structure is proposed to integrate optical input function for new application in next generation mobile devices. The optical input function, used for image scanner, fingerprint recognition, and touch-input application, are achieved by integrating these image sensor elements within each display pixel. A 2-transistor (2T) active pixel sensor (APS) is used to integrate a VGA (> 250 dpi) image sensor within an LCD panel.