Chun-Hao Tu

Behaviors of InGaZnO thin film transistor under illuminated positive gate-bias stress

In this letter, we investigate the impact of the light illumination on the stability of indium–gallium– zinc oxide thin film transistors under positive gate-bias stress. The noticeable decrease in threshold voltage Vt shift more than 5.5 V under illuminated positive gate-bias stress indicates a superior reliability in contrast with the dark stress. The accelerated Vt recovery characteristic compared with dark recovery demonstrates that the charge detrapping effect was enhanced under illumination. Furthermore, the average effective energy barrier of charge trapping and detrapping was derived to verify that illumination can excite the trapped charges and accelerate the charge detrapping process.

Light-induced instability of an InGaZnO thin film transistor with and without SiOx passivation layer formed by plasma-enhanced-chemical-vapor-deposition

This paper investigates the illuminated behaviors of InGaZnO thin film transistors with and without a SiOx passivation. For the passivated device, more interface states were generated during SiOx passivation layer deposition by plasma-enhanced-chemical-vapor-deposition. The enhanced trap-assisted photoexcited hole generation induces source side barrier lowering and causes an apparent subthreshold stretch-out phenomenon. However, for the unpassivated device, the fact that the threshold voltage shift in ambient oxygen is lower than in vacuum under light illumination suggests oxygen desorption and readsorption occurs simultaneously, which is consistent with the accelerated recovery rate in oxygen ambiance.

Effects of Ambient Atmosphere on Electrical Characteristics of Al2O3 Passivated InGaZnO Thin Film Transistors during Positive-Bias-Temperature-Stress Operation

This study investigates the effects of ambient atmosphere on electrical characteristics of Al2O3 passivated InGaZnO thin film transistors during positive bias temperature stress. Under H2O vapor environment, the Al2O3 passivated device exhibited stable electrical behaviors (ΔV th < 0.5 V), while the unpassivated device showed an apparent hump effect in the transfer curves under bias stress. The hump phenomenon was attributed to the absorption of the H2O molecule which can serve as a donor to develop a conductive back channel. The experiment results suggest that Al2O3 is an effective passivation layer to suppress water vapor absorption in the InGaZnO back channel.

Formation of stacked Ni silicide nanocrystals for nonvolatile memory application

The formation of stacked Ni silicide nanocrystals by using a comixed target is proposed in this letter. High resolution transmission electron microscope analysis clearly shows the stacked nanocrystals embedded in the silicon oxide. The memory window enough to define “1” and “0” states is obviously observed at low voltage programming conditions, and good data retention characteristics are exhibited for the nonvolatile memory application. A physical model is also proposed further to explain the saturation phenomenon of threshold voltage at different programming voltages with operation duration.

High-performance polycrystalline silicon thin-film transistor with multiple nanowire channels and lightly doped drain structure

This investigation examines polycrystalline silicon thin-film transistors (TFTs) with multiple nanowire channels and a lightly doped drain (LDD). A device with an LDD structure exhibits low leakage current because the lateral electrical field is reduced in the drain offset region. Additionally, multiple nanowire channels can generate fewer defects in the polysilicon grain boundary and have more efficient NH3 plasma passivation than single-channel TFTs, further reducing leakage current. They exhibit superior electrical characteristics to those of single-channel TFTs, such as a higher ON/OFF current ratio (>108), a better subthreshold slope of 110 mV/decade, an absence of drain-induced barrier lowering, and suppressed kink-effect. Devices with the proposed TFTs are highly promising for use in active-matrix liquid-crystal display technologies.

Improved memory window for Ge nanocrystals embedded in SiON layer

The formation of germanium Ge nanocrystals embedded in silicon oxygen nitride SiON is proposed for charge storage elements in this work. The Ge nanocrystals can be nucleated after the oxidation process of silicon germanium nitride SiGeN layer at high temperatures. Compared to the control samples of Ge nanocrystals/SiO2/Si structure and SiON/Si stack memory, the proposed Ge nanocrystals/SiON/Si memory obtained superior memory window, even larger than the typical sum of both. It is considered that the extra interface trap states between Ge and SiON film were generated as Ge nanocrystals were embedded in SiON layer.

Effects of channel width on electrical characteristics of polysilicon TFTs with multiple nanowire channels

This brief studies the electrical characteristics of a series of polysilicon thin-film transistors (poly-Si TFTs) with different numbers of multiple channels of various widths, with lightly doped drain (LDD) structures. The nanoscale TFT with ten 67-nm-wide split channels (M10) has superior and more uniform electrical characteristics than other TFTs. Additionally, experimental results reveal that the electrical performance of proposed TFTs enhances with each channel width decreasing, yielding a profile from a single-gate to tri-gate structure.

Nonvolatile memory characteristics of nickel-silicon-nitride nanocrystal

The formation of nickel-silicon-nitride nanocrystals by sputtering a comixed target in the argon and nitrogen environment is proposed in this letter. High resolution transmission electron microscope analysis clearly shows the nanocrystals embedded in the silicon nitride and x-ray photoelectron spectroscopy also shows the chemical material analysis of nanocrystals. The memory window of nickel-silicon-nitride nanocrystals enough to define 1 and 0 states is obviously observed, and a good data retention characteristic to get up to 10 years is exhibited for the nonvolatile memory application.

Role of germanium in the reduced temperature dependence of Ti-based nanocrystals formation for nonvolatile memory applications

We investigated the physical and electrical characteristics of Ti-based nanocrystals (NCs) with composition of germanium fabricated by cosputtering titanium silicide and germanium targets for low temperature applications of nonvolatile memory. The addition of Ge significantly reduces the thermal budget necessary for Ti-based NCs formation to 500 °C in 2 min due to the rise of its morphological instability and agglomeration properties. Compositions characteristics were analyzed by x-ray photon-emission spectroscopy and formations of NCs were observed by transmission electron microscopy. Additionally, capacitance-voltage characteristics, data retention, and endurance properties are characterized to demonstrate its advantages for nonvolatile memory device applications.

Formation of germanium nanocrystals embedded in silicon-oxygen-nitride layer

The formation of germanium nanocrystals embedded in silicon-oxygen nitride with distributed charge storage elements is proposed in this work. A large memory window is observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after high temperature oxidized SiGeN layer. The nonvolatile memory with the Ge nanocrystals embedded in SiON stack layer exhibits 4V threshold voltage shift under 10V write operation. Also, the manufacture technology using the sequent high-temperature oxidation of the a-Si layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices.