Joan Nicolas-Apruzzese

Model Predictive Current Control of Grid-Connected Neutral-Point-Clamped Converters to Meet Low-Voltage Ride-Through Requirements

The low-voltage ride through (LVRT) requirement demands the wind power plants to remain connected to the grid in the presence of grid voltage dips, actively helping the network overall control to keep network voltage and frequency stable. Wind power technology points to increase power ratings. Hence, multilevel converters, as for example, neutral-point- clamped (NPC) converters, are well suited for this application. Predictive current control presents similar dynamic response and reference tracking than other well-established control methods, but working at lower switching frequencies. In this paper, the predictive current control is applied to the grid-side NPC converter as part of a wind energy conversion system, in order to fulfill the LVRT requirements. DC-link neutral-point balance is also achieved by means of the predictive control algorithm, which considers the redundant switching states of the NPC converter. Simulation and experimental results confirm the validity of the proposed control approach.

A Multilevel Active-Clamped Converter Topology—Operating Principle

This paper presents a novel multilevel active-clamped converter topology, which is an extension to m levels of the three-level active neutral-point-clamped topology. The operating principle is established through the definition of a proper set of switching states and a transition strategy between adjacent switching states. The benefits of the proposed converter topology and control in comparison to alternative multilevel converter topologies are discussed. The simulation and experimental results of a simple four-level dc-dc converter configuration are presented to illustrate the converter performance features. The experimental results of a four-level three-phase dc-ac converter are also presented to further validate the proposed topology and operating principle.

Analysis of the Fault-Tolerance Capacity of the Multilevel Active-Clamped Converter

Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active-clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered, and the analysis is carried out under single-device and two simultaneous device faults. Switching strategies and different hardware modifications to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.

Enhanced DC-Link Capacitor Voltage Balancing Control of DC–AC Multilevel Multileg Converters

This paper presents a capacitor voltage balancing control applicable to any multilevel dc-ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc-ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc-ac conversion system.

Operating Principle and Performance Optimization of a Three-Level NPC Dual-Active-Bridge DC–DC Converter

Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc-dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter.

FPGA Implementation of a PWM for a Three-Phase DC–AC Multilevel Active-Clamped Converter

With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator.

Design issues of the multilevel active-clamped converter

This paper studies several design issues of the multilevel active-clamped (MAC) topology. Several guidelines are proposed to guarantee a proper MAC converter design and improve its performance. The inclusion of a resistor network to balance the blocking voltage of devices when the converter is in OFF state, the use of self-powered gate-driver power-supplies, or the definition of a shut-down sequence to avoid possible device failures are some of the proposals. This paper also studies the singular device current spikes that appear in the MAC topology during switching state transitions. These spikes occur owing to diode reverse recovery and to the discharging of the device output parasitic capacitances. A proper device selection reduces these current peaks, decreasing the switching losses and the converter electromagnetic interference. Experimental tests are carried out with a four-level MAC prototype to validate the analysis.

A Novel Approach to Generate Effective Carrier-Based Pulsewidth Modulation Strategies for Diode-Clamped Multilevel DC–AC Converters

Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc-ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies.

Predictive current control of a back-to-back NPC wind energy conversion system to meet low voltage ride-through requirements

Predictive current control is applied to a wind energy conversion system implemented with a permanent-magnet synchronous generator connected to the grid through a back-to-back neutral-point-clamped converter. This control approach allows to work in steady-state and to fulfill the low-voltage ride through requirements demanded by the power system operators. Dc-link neutral point voltage balance is also achieved by means of the predictive control algorithm.

Fault-tolerance capacity of the multilevel active clamped topology

Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered and the analysis is carried out under single-device and two-simultaneous-device faults. Switching strategies to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.