João Paulo Kitajima

Performance evaluation of a parallel tabu search task scheduling algorithm

Abstract This paper presents the solution quality analysis of a parallel tabu search algorithm for the task scheduling problem on heterogeneous processors under precedence constraints. We evaluate the achieved makespan reduction of different parallel applications, relatively to the results obtained by the best greedy algorithm in the literature, as a function of parameters such as problem size, system heterogeneity, and number of processors. Our results show that the parallel tabu search algorithm leads to much better solutions than the greedy algorithm in many cases where the latter is not capable of profiting from the inherent application parallelism and system heterogeneity.

Parallelizing MPEG video encoding using multiprocessors

Many computer applications are currently using digital video. Recent advances in digital imaging and faster networking infrastructure made this technology very popular, not only for entertainment, but also in health and education applications. However, high quality video requires more storage space and communication bandwidth than traditional data. To deal with this problem, most of the digital video encoding techniques use a compression scheme. The MPEG committee has defined widely used standards for digital video encoding providing high quality images and high compression rates. However, real-time MPEG encoding also demands high computational power, usually far beyond traditional sequential computers can provide. Fortunately, the algorithms compliant to the MPEG standard can be parallelized. In this work, we propose a novel and simple shared-memory parallel algorithm for MPEG-1 video encoding based on the parallel execution of different coarse grained tasks (read pictures, write coded frames, I, P, and B frames coding). Two synchronization strategies are implemented and experimental results show that encoding rates of 43 frames per second are achieved, which is almost 50% better than the real-time encoding standard rate (30 frames per second).

Parallel generation of inverted files for distributed text collections

The authors present a scalable algorithm for the parallel computation of inverted files for large text collections. The algorithm takes into account an environment of a high bandwidth network of workstations with a shared-nothing memory organization. The text collection is assumed to be evenly distributed among the disks of the various workstations. Compression is used to save space in main memory (where inverted lists are kept) and to save time when data have to be moved across the network. The algorithms average running cost is O(t/p) where t is the size of the whole text collection and p is the number of available processors. The authors implemented their algorithm and drew experimental results. In a 100 Mbits/s switched Ethernet network with 4 PentiumPro 200 MHz, 128 MB RAM on each processor they were able to invert 2 GB of TREC documents in 15 minutes. Further they also proposed an analytical model for the algorithm execution time.

Distributed Generation of Suffix Arrays

An algorithm for the distributed computation of suffix arrays for large texts is presented. The parallelism model is that of a set of sequential tasks which execute in parallel and exchange messages among them. The underlying architecture is that of a high bandwidth network of processors. Our algorithm builds the suffix array by quickly assigning an independent subproblem to each processor and completing the process with a final local sorting. We demonstrate that the algorithm has time complexity of O(b log n) computation and O(b) communication in the average case, where b corresponds to the local text size on each processor (i.e., text size n divided by r, the number of processors). This is faster than the best known sequential algorithm and improves over previous parallel algorithms to build suffix arrays, both in time complexity and scaling factor.

Modelling parallel program behaviour in ALPES

Abstract The goal of this paper is to present ANDES, a language for modelling quantitative behaviour of parallel programs. ANDES is employed in the ALPES environment. From an ANDES quantitative model, a parallel synthetic program is generated. This synthetic program is executed on a real distributed memory parallel computer. Some performance indices are obtained from this execution. Currently, mapping strategies are being evaluated using this approach. The ALPES environment is a research domain in the APACHE project.

A fast distributed suffix array generation algorithm

We present a distributed algorithm for suffix array generation, based on the sequential algorithm of U. Manber and E. Myers (1993). The sequential algorithm is O(nlogn) in the worst case and O(nloglogn) on average, where n is the text size. Using p processors connected through a high bandwidth network, we obtain O((n/p)loglogn) average time, which is an almost optimal speedup. Unlike previous algorithms, the text is not transmitted through the network and hence the messages exchanged are much smaller. We present some experimental evidence to show that the new algorithm can be faster than the sequential Manber & Myers counterpart.

Distributed parallel generation of indices for very large text databases

We propose a new algorithm for the parallel generation of suffix arrays for large text databases on high-bandwidth computer networks. Suffix arrays are structures used in full text indexing which support very powerful query languages. Our algorithm is based on a parallel indirect mergesort (it is not a simple mergesort procedure) and is compared with a well known sequential algorithm (which is very efficient running on a single machine). Although network-bounded, the parallel version is theoretically and experimentally a much better alternative when compared to the sequential version (which is I/O-bounded in disk).

Using Synthetic Workloads for Parallel Task Scheduling Improvement Analysis

This paper presents an experimental validation of makespan improvements of two scheduling algorithms: a greedy construction algorithm and a tabu search based algorithm. Synthetic parallel executions were performed using the scheduled graph costs. These synthetic executions were performed on a real parallel machine (IBM SP). The estimated and observed response times improvements are very similar, representing the low impact of system overhead on makespan improvement estimation. This guarantees a reliable cost function for static scheduling algorithms and confirms the actual better results of the tabu search meta-heuristic applied to scheduling problems.

Improving Transputer Internal Memory Reliability with Transparent Test: Case Study and Performance Analysis

Abstract This paper presents a test procedure allowing on-line fault detection for the transputer internal memory during periodical field tests. The technique is based on Transparent BIST, which was implemented by software (transputer instruction set) and by taking advantage of the existing transputer hardware characteristics. The main characteristics of the transputer and internal memory are presented, as well as a detailed description of the test implementation and experimental results. Additionally, the degradation induced by the periodical field test in global system performance is discussed. The test approach can also be applied at the board level in order to verify the main memory system. Aiming to improve the performance of this type of test, it is also described some features being developed along with the PISH Project (Projeto Integrado de Software/Hardware - CNPq - Protem/CC). These features deal with the use of programmable logic devices (FPGAs) to implement dedicated hardware for board-level testing purposes.