Is this you? Create Your Porfile
Avatar

Joel S. Emer

Hewlett-Packard

Network

Latest external collaboration on country level. Dive into details by clicking on the dots.

Explore More

Hotspot

Dive into the research topics where Joel S. Emer is active.

Explore More

Publication

Featured researches published by Joel S. Emer.

Archive | 1999

Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit

Joel S. Emer; Rebecca L. Stamm; Bruce E. Edwards; Matthew H. Reilly; Craig B. Zilles; Tryggve Fossum; Christopher F. Joerg; James E. Hicks

Archive | 1996

Thread properties attribute vector based thread selection in multithreading processor

Joel S. Emer; Rebecca L. Stamm; Trggve Fossum; Robert H. Halstead; George Z. Chrysos; Dean M. Tullsen; Susan Eggers; Henry M. Levy

Archive | 1993

Integrated circuit chip having primary and secondary random access memories for a hierarchical cache

Ricky C. Hetherington; Francis X. McKeen; Joseph D Marci; Tryggve Fossum; Joel S. Emer

Archive | 2000

Pipelined multi-thread processor selecting thread instruction in inter-stage buffer based on count information

Joel S. Emer; Rebecca L. Stamm; Trggve Fossum; Robert H. Halstead; George Z. Chrysos; Dean M. Tullsen; Susan Eggers; Henry M. Levy

Archive | 1998

Method and apparatus for predicting memory dependence using store sets

George Z. Chrysos; Joel S. Emer; Bruce E. Edwards; John H. Edmondson

Archive | 1993

Apparatus and method for speculatively executing instructions in a computer system

Francis X. McKeen; Michael Adler; Joel S. Emer; Robert P. Nix; David J. Sager; P. Geoffrey Lowney

Archive | 2002

Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers

Joel S. Emer; Rebecca L. Stamm; Bruce E. Edwards; Matthew H. Reilly; Craig B. Zilles; Tryggve Fossum; Christopher F. Joerg; James E. Hicks

Archive | 1993

Mechanism for enforcing the correct order of instruction execution

Francis X. McKeen; Michael Adler; Joel S. Emer; Robert P. Nix; David J. Sager; P. Geoffrey Lowney

Archive | 1993

Method and apparatus for propagating exception conditions of a computer system

Francis X. McKeen; Michael Adler; Joel S. Emer; Robert P. Nix; David J. Sager; P. Geoffrey Lowny

Archive | 1993

Method and apparatus for employing a cycle bit parallel executing instructions

Joseph Dominic Macri; Francis X. McKeen; Joel S. Emer; William R. Grundmann; Robert P. Nix; David A. Webb

Explore More

Collaboration

Dive into the Joel S. Emer's collaboration.

Top Co-Authors
Avatar

Tryggve Fossum

Intel

View shared research outputs
Top Co-Authors
Avatar

Francis X. McKeen

Hewlett-Packard

View shared research outputs
Top Co-Authors
Avatar

Michael Adler

Intel

View shared research outputs
Top Co-Authors
Avatar

Rebecca L. Stamm

Hewlett-Packard

View shared research outputs
Top Co-Authors
Avatar

Robert P. Nix

Hewlett-Packard

View shared research outputs
Top Co-Authors
Avatar

David J. Sager

Hewlett-Packard

View shared research outputs
Top Co-Authors
Avatar

George Z. Chrysos

Hewlett-Packard

View shared research outputs
Top Co-Authors
Avatar

Angshuman Parashar

Intel

View shared research outputs
Top Co-Authors
Avatar

Dean M. Tullsen

University of California

View shared research outputs
Top Co-Authors
Avatar

Henry M. Levy

University of California

View shared research outputs
Explore More
Researchain Logo
Decentralizing Knowledge